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#12 | |
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"Mike"
Aug 2002
2×23×179 Posts |
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We've seen it go as low as 2-3MB free, and we don't run any heavy applications. We also have a 4GB ReadyBoost cache as well. We sure wish we had the 64-bit version. The 32-bit version doesn't see all of our memory.
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#13 | ||
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∂2ω=0
Sep 2002
República de California
19×613 Posts |
Quote:
Fortune Big Tech: Has Intel Crushed AMD? Quote:
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#14 | |
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Dec 2002
5·163 Posts |
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- fast memory lanes and fast processors, really a big increase in speed will be in 2009 with the introduction of a new Intel processor design. Like the Core 2 was a big improvement over the flawed Pentium IV design. - So you might want to spend your money in 2009 and buy a cheap model in 2008, which you then give to your little brother a year later. |
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#15 |
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Feb 2006
AR, US
24·32 Posts |
The Intel NEHALEM architecture will debut in 2009, with an integrated memory controller, including an octo-core cpu.
The memory bottleneck will be somewhat relieved. Maybe the cache sizes will increase to the point where a memory bottleneck is no longer relevant to PRIME95. |
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#16 | ||
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Dec 2005
1348 Posts |
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Then that will be fast enough until the numbers become so big that n instances of Prime95 exceed the storage capabilities of the n * 8MB of L2 cache, at which point we will need n * 16MB of L2 cache. Quote:
http://blogs.intel.com/technology/20...d_graphics.php That would be the best thing to do. |
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#17 |
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Aug 2002
North San Diego County
2AD16 Posts |
The primary issue with Prime95 and integrated graphics is the use of main memory for the framebuffer; it can consume a [formerly huge (think PC100 days), now less substantial] portion of the memory bandwidth. The additional CPU cycles needed to render the images remains minor in comparison.
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#18 | |
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Sep 2006
Brussels, Belgium
35·7 Posts |
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But considering that : -with quad cores the performance for LL is proportional to the memory speed (tested with 5400, 6400, 8500 memory), - the original query was about "FAST!" memory, the proposals of 5300 or 6400 memory did not meet the request. 8500 memory is not the fastest currently available but it is still affordable, if price was not a problem the answer to the query would have been a DDR3 board with DDR3 1800 (PC3 14400) memory but that kind of memory is priced in the 500,00 USD range. Jacob |
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#19 |
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Jun 2003
2·3·7·112 Posts |
Is there any point in having a memory faster than the FSB? I think low latency might be better than high bandwidth for P95. Anybody out there with some concrete numbers?
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#20 | ||
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Dec 2005
1348 Posts |
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Quote:
http://www.asus.com/products.aspx?l1...29&modelmenu=1 It has the lowest latencies avaliable by nature of having the ICs soldered onto the board, although avaliability will be a problem and he will need a discrete graphics accelerator as Asus does not design its products to cater to the scientific community. All of the electrons in a computer travels at a fixed rate, roughly 0.9c. Computers use pulses, that operate at certain frequencies to send data over fixed pathways. Each cycle takes up a certain amount of time and with each cycle, a certain amount of data is sent over these pathways. If you increase the frequencies at which the computer operates, say by a factor of two, the amount of data transfered per cycle will not change, but the number of cycles per given time unit will change and since the number of cycles per given time unit in this example have increased by a factor of two, the time it takes from the moment the first unit of data is received and the last unit of data is received, from a given transmission, is cut by a factor of two. The time it takes between sending the first unit of data and receiving the first unit of data, will however, remain constant. Because of this, latencies go down with higher memory transfer rates, but there is a limit to how much it can go down. |
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#21 | |
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∂2ω=0
Sep 2002
República de California
19·613 Posts |
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#22 | |
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Dec 2005
22·23 Posts |
Quote:
http://www.kpsec.freeuk.com/trancirc.htm Also, in a DC circuit, electrons are always moving in a current with their average position being the integral of their average velocity while in an AC circuit, their position is a sine function involving time, a frequency and a phase angle, mutipled by some amplitude and their velocity at Pi minus the phase angle plus any mutiple of two Pi being zero. In an AC circuit, talking about currents is meaningless because each electron never leaves a sphere with a radius that is the amplitude of the wave function and an origin that is the point where its velocity is zero. Despite that, I was wrong. Not all of the electrons in a computer travel at a fixed rate (which is actually an average rate), as some of the electrons in the PSU travel back and forth, with no net change in displacement worth mentioning. By the way, that is interesting, but it does not answer axn1's question. Getting back to his question, I would like to add some information I omitted: Low timing memory reduces the amount of time from the memory receiving a request to the memory sending a request, but with DDR2 memory (and I believe even more profoundly with DDR3 memory), many times lower clock rates hurt latencies more than lower timings help. Also, "All of the electrons in a computer travels at a fixed rate, roughly 0.9c" should have been "All of the electrons in a computer travel at a fixed rate, roughly 0.9c." I apologize for my misuse of the English language. Last fiddled with by ShiningArcanine on 2007-12-14 at 18:30 Reason: Added something I forgot |
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