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#23 | ||
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Aug 2002
26×5 Posts |
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#24 | |
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Jan 2003
2×7 Posts |
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BTW, here you can find an article about x86-64 and 64-bit computing in general: http://arstechnica.com/cpu/03q1/x86-64/x86-64-1.html |
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#25 | |
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Jan 2003
1410 Posts |
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Besides, the biggest advantage of x86-64 is not that it is 64-bit. The ability to fix some of the flaws of the x86 ISA (ie. few available registers) has a big effect on performance. |
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#26 | |
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Aug 2002
101 Posts |
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#27 | ||
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Jan 2003
2·7 Posts |
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*Mostly server, workstation and (beowulf) cluster folk. |
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#28 |
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Aug 2002
101 Posts |
So it is not really a x86-64 advantage. AMD is merely using this chance to add more registers.
Yea IA32 is hard to improve. That is why intel defines an all new IA64 architecture. |
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#29 |
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Aug 2002
5008 Posts |
I really wish AMD moved to a 3 operand format with x86-64, but I guess that would have required too much redesign of the decoders.
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#30 |
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Dec 2002
3×5 Posts |
Out of interest what performance advantages would that give?
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#31 |
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Jan 2003
North Carolina
3668 Posts |
Three operands would combine two instructions into one.
Think of doing c=a+b A two operand format would have to temporarily put the result (a+b) in a register, then execute another instruction to store it into c. A three operand format would perform the addition (a+b) and place the result straight into c. I've over simplified the example being as different chip architectures (I was thinking of the VAX chip with its three operand format) will do it differently, but I hope you get the idea. A three operand format is more complex than two which can a good thing or a bad thing depending on the chip's architecure goals. |
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#32 | |
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Aug 2002
101 Posts |
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#33 | ||
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∂2ω=0
Sep 2002
República de California
22×2,939 Posts |
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