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#1 |
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Jul 2004
Nowhere
809 Posts |
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#2 |
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6809 > 6502
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Aug 2003
101×103 Posts
22·2,767 Posts |
Title contains a misspell. Iron<>Iorn
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#3 | |
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Oct 2004
232 Posts |
Quote:
Title contains a misspell. "Itanium" should read "ITANIC" (rhymes with "Titanic") The linked story "Intel CLAIMS performance crown" is a little premature. When this chip is actually shipping we can compare it with a shipping quad core Opteron. In any case the "impressive" Linpack performances quoted are only as good as maybe a COUPLE of Clearspeed CSX600 chips. Considering the likely vast COST of the Quad Itanic, there may be more bang-per-buck alternative ways to get that performance. Last fiddled with by Peter Nelson on 2006-03-22 at 02:10 |
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#4 | |
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"Yury Vorobyov"
Jul 2013
Chelyabinsk
19 Posts |
Quote:
Regardless implementation, EPIC is a key to modern computing, where VLIW and ILP both faults. ILP faults in parallelism and VLIW faults at caching. |
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