FATAL ERROR: Rounding was 0.49xxxxxx, expected less 4

[tester]

Dear Sir,
I got seriously error message "FATAL ERROR: Rounding was 0.49xxxxxx, expected less than 0.4 " when I ran Prime95 on my platform. Can anybody tell me what "0.49xxxx" mean ? How does the Prime95 get the expected value 0.4 and how it calculate the value 0.49xxx ? I found this error messages will easily happen after CPU clock is throttling. Does Prime95 use any formulation sensitive to the time clock ? Please help me and advice.

[Xyzzy]

If your P4 is throttling it might be due to excessivly high die temps... That could easily cause this error...

[tester]

Originally Posted by Xyzzy

If your P4 is throttling it might be due to excessivly high die temps... That could easily cause this error...

My CPU speed is 2.8G. I can make sure its temperature didn't over Intel specification, and the throttling is turned on by myself using a software utility. Can anyone help me to check if the "Prime95, torture test rounding error" will appear when CPU throttling is on, even CPU temperature is very low ? Currently, most PC design will take CPU thermal into account. In order to prevent CPU temperature over spec, PC designer will force CPU clock throttling when CPU Tcase is near its maximum value. If CPU temperature is over spec, system will auto shutdown to protect it. So, I think CPU temperature should be always under spec, and won't result calculation error or rounding error. I just suspect the clock throttling is the root cause ???!!!

[Xyzzy]

What utility will allow you to turn on the throttling?

[tester]

Originally Posted by Xyzzy

What utility will allow you to turn on the throttling?

If your platform use Intel ICH3 chipset, then you can set one bit in PCI register to force CPU clock throttling. If your platform is not using Intel chipset, you may need to manually active the THRM# pin of south bridge to trigger the thermal throttling mechanism!

[Prime95]

Originally Posted by tester

Can anybody tell me what "0.49xxxx" mean ? How does the Prime95 get the expected value 0.4 and how it calculate the value 0.49xxx ? I found this error messages will easily happen after CPU clock is throttling. Does Prime95 use any formulation sensitive to the time clock ?

Prime95 does a Fast Fourier Transform to multiply two large integers using floating point instructions. When multiplying integers you expect an integer result. However using floating point instructions introduces some inexactness into the computation. When the FFT completes prime95 rounds all the floating point numbers back to integers. That is, 14.9 or 15.1 is rounded back to 15.0.

These inexactness errors will always be small. That is, the 15.0 example above will be something like 15.1 or 15.2 but never 15.45 or 15.4999.
As a sanity check, prime95 calculates the difference between the integer value and the floating point value and raises an error if it ever exceeds 0.4.

Prime95's calculations are not sensitive to the clock speed. It looks like clock throttling is not working properly on your CPU.

[sjhanson]

I am having the exact same problem on a 2.26Ghz. How could I tell if my chip is clock throttling and causing my problem?

[Prime95]

I've never seen a P4 clock throttle. It is only supposed to kick in at 70 degrees Celcius. See the stress.txt file for a list of much more likely causes.

[QuintLeo]

Don't some of the P4s have a max temperature limit of 65 C?

[Xyzzy]

ftp://download.intel.com/design/Pentium4/datashts/24919805.pdf
ftp://download.intel.com/design/Pentium4/datashts/24988703.pdf
ftp://download.intel.com/design/Pentium4/datashts/29864307.pdf

The lowest listed in these documents is 68C... These three PDFs cover all P4 models ever made, other than mobile P4s... Those are covered here...

ftp://download.intel.com/design/mobile/datashts/25068605.pdf

[Xyzzy]

Some interesting info...

The Thermal Monitor feature found in the Pentium 4 processor with 512-KB L2 cache on 0.13 micron process allows system designers to design lower cost thermal solutions without compromising system integrity or reliability. By using a factory-tuned, precision on-die thermal sensor and a fast acting thermal control circuit (TCC), the processor, without the aid of any additional software or hardware, can keep the processor’s die temperature within factory specifications under nearly all conditions. Thermal Monitor thus allows the processor and system thermal solutions to be designed much closer to the power envelopes of real applications, instead of being designed to the much higher processor maximum power envelopes. Thermal Monitor controls the processor temperature by modulating (starting and stopping) the processor core clocks. The processor clocks are modulated when the TCC is activated. Thermal Monitor uses two modes to activate the TCC: Automatic mode, and On-Demand mode. Automatic mode is required for the processor to operate within specifications and must first be enabled via BIOS. Once automatic mode is enabled, the TCC will activate only when the internal die temperature is at very near the temperature limits of the processor. When the TCC is enabled and a high temperature situation exists (i.e. TCC is active), the clocks will be modulated by alternately turning the clocks off and on at a duty cycle specific to the processor (typically 30-50%). Cycle times are processor speed dependent and will decrease linearly as processor core frequencies increase. Once the temperature has returned to a non-critical level, modulation ceases and TCC goes inactive. A small amount of hysteresis has been included to prevent rapid active/inactive transitions of the TCC when the processor temperature is near the trip point. Processor performance will be decreased by approximately the same amount as the duty cycle when the TCC is active; however, with a properly designed and characterized thermal solution, the TCC will be activated only briefly when running the most power intensive applications in a high ambient temperature environment. For automatic mode, the duty cycle is factory configured and cannot be modified. Also, automatic mode does not require any additional hardware, software drivers, or interrupt handling routines. The TCC may also be activated via On-Demand mode. If bit 4 of the ACPI Thermal Monitor Control Register is written to a “1”, the TCC will be activated immediately independent of the processor temperature. When using On-Demand mode to activate the TCC, the duty cycle of the clock modulation is programmable via bits 3:1 of the same ACPI Thermal Monitor Control Register. In automatic mode, the duty cycle is fixed. However, in On-Demand mode, the duty cycle can be programmed from 12.5% on/87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-Demand mode may be used at the same time Automatic mode is enabled. However, if the system tries to enable the TCC via On-Demand mode at the same time automatic mode is enabled AND a high temperature condition exists, the duty cycle of the automatic mode will override the duty cycle selected by the On-Demand mode. An external signal, PROCHOT# (processor hot), is asserted when the processor detects that its temperature is at the thermal trip point. Bus snooping and interrupt latching are also active while the TCC is active. The temperature at which the thermal control circuit activates is not user configurable and is not software visible. Besides the thermal sensor and TCC, the Thermal Monitor feature also includes one ACPI register, performance monitoring logic, bits in three model specific registers (MSR), and one I/O pin (PROCHOT#). All are available to monitor and control the state of the Thermal Monitor feature. Thermal Monitor can be configured to generate an interrupt upon the assertion or de-assertion of PROCHOT#. If automatic mode is disabled the processor will be operating out of specification. Regardless of enabling of the automatic or On-Demand modes, in the event of a catastrophic cooling failure the processor will automatically shut down when the silicon has reached a temperature of approximately 135 °C. At this point the system bus signal THERMTRIP# will go active and stay active until RESET# has been initiated. THERMTRIP# activation is independent of processor activity and does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage (VCC) must be removed within 0.5 seconds.