![]() |
|
|
#23 | |
|
Sep 2016
22×5×19 Posts |
Quote:
When the same execution port has to handle instructions of different latencies, there can be problems on the write back - IOW, the pipeline sorta gets messed up. On Skylake, everything is 4 cycles. No issues here. On Haswell, adds are 3 and mul/FMA are 5 cycles. They share one of the ports. But IIRC, George mentioned pipeline bubbles from this. So he changed the adds to FMAs with a 1 multiplier. This normalizes everything to 5 cycles - no more issues. On Broadwell, adds are 3, but multiply has also been reduced to 3. FMA remains at 5. So unless George updated his code to account for that, you now have a mix of "5 cycle" adds, 5 cycle FMAs, and 3 cycle multiplies - thus mismatching latencies and pipeline conflicts. For most software that isn't that tightly optimized, reducing the latency of something will be a benefit. But perhaps not in this case. ---- In other words, Intel knowingly did the trade-off to increase the FP-add latency from 3 to 4 cycles to normalize it with everything else. Last fiddled with by Mysticial on 2019-05-30 at 22:09 |
|
|
|
|
|
|
#24 |
|
Undefined
"The unspeakable one"
Jun 2006
My evil lair
6,793 Posts |
So while the uses mentioned here for QP are legitimate, they aren't exactly killer apps, or in widespread use. You'll need to find a better argument to convince Intel/AMD. Show them the positive ROI.
I watched an animated movie recently, Ralph Breaks the Internet. Which is quite good actually. The level of detail and accuracy of rendering are particularly stunning. Really good texturing without any tearing or discontinuities. Long distance zooms and antialiasing and whatnot are flawless. And it is all done using nothing more than standard IEEE64 floats. QP not required. On the other side of the coin. I've seen Mandelbrot deep zooms that would quickly become nonsense after a few frames if all that was available was DP floats. But QP also wouldn't help much either. Nothing but full on arbitrary precision to at least 3k+ bits floats is needed there. |
|
|
|
|
|
#25 |
|
Oct 2008
n00bville
25×23 Posts |
In the AMD keynote I have heard they doubled the floating point performance. Won't that impact the Prime95 performance?
Or am I completely off the track? Last fiddled with by joblack on 2019-05-31 at 11:49 |
|
|
|
|
|
#26 |
|
"Sam Laur"
Dec 2018
Turku, Finland
317 Posts |
It should, indeed, impact Prime95 performance, as rumors have long said that the doubling will be in AVX. Combine that with the better memory performance, and we might have a winner. But, as always, better wait for real benchmarks instead of just marketing promises...
|
|
|
|
|
|
#27 |
|
Feb 2016
UK
26×7 Posts |
I intend to buy one as soon as practical to test. My uses are more with LLR and relatively smaller FFT sizes, so that should be run out of the 32MB L3 cache and not be ram limited. It will be interesting... if 32MB is not sufficient then ram will probably remain a limiting factor. Dual channel even at somewhat higher speeds is unlikely to be enough.
The 64MB of the 12 core model might get around that, but we have two chiplets inside that and we don't know how well they will communicate with each other. |
|
|
|
|
|
#28 | |
|
∂2ω=0
Sep 2002
República de California
22·2,939 Posts |
Quote:
Last fiddled with by ewmayer on 2019-05-31 at 20:01 |
|
|
|
|
|
|
#29 |
|
Feb 2016
UK
44810 Posts |
The next gen Ryzens are expected next month, although your guess is as good as any on what real availability will be like. I do intend to get one quickly. I'd say it is worth the wait to find out, unless you absolutely have to get something today. I doubt the existing models will see much if any further price drop. They have already fallen significantly over their marketing life. I would hope they're not over-producing them, so no fire sales to clear inventory.
|
|
|
|
|
|
#30 |
|
Sep 2016
22×5×19 Posts |
I was planning an mATX Zen 2 build and went so far as to start picking a case, a PSU, price watching ram, and matching RGB components.
But I was targeting the 16-core Zen 2... Seeing as how AMD is holding back the 16-core, I guess I'm scrapping those plans for now. ![]() It would be a good compilation box and non-AVX512 workhorse. And I'm really curious to see exactly how bad the memory bottleneck will be. I imagine they will wreck as much havoc on my superoptimizer tuning tables as Skylake X did 2 years ago. Only this time, there's a lot less room to optimize since I "used it all up" in response to Skylake X already. Last fiddled with by Mysticial on 2019-06-01 at 00:01 |
|
|
|
|
|
#31 | ||||||
|
"Composite as Heck"
Oct 2017
95010 Posts |
Quote:
Quote:
Quote:
Quote:
Quote:
Quote:
|
||||||
|
|
|
|
|
#32 | |
|
Oct 2007
Manchester, UK
53×11 Posts |
Quote:
Of course doubles have a higher precision, but the counterpoint is that single precision floats give you 7 decimal digits, which on the face of it does seem rather a lot, very few constants are measured to that level of precision. Two that spring to mind are the speed of light (defined), and planck's constant, but neither are exactly in common use. tl;dr What is the "killer app" for doubles? Last fiddled with by lavalamp on 2019-06-01 at 20:09 |
|
|
|
|
|
|
#33 |
|
Undefined
"The unspeakable one"
Jun 2006
My evil lair
6,793 Posts |
I suspect it was finance. Before 64bit integer CPUs were introduced "everyone" used the FPU to compute their millions. Excel is a good example of this.
And yes, rounding problems were rife. But how else to handle fractional percentages with only integer arithmetic? Last fiddled with by retina on 2019-06-01 at 20:15 |
|
|
|
![]() |
Similar Threads
|
||||
| Thread | Thread Starter | Forum | Replies | Last Post |
| Ryzen help | Prime95 | Hardware | 9 | 2018-05-14 04:06 |
| Ryzen 2 efficiency improvements | M344587487 | Hardware | 3 | 2018-04-25 15:23 |
| Help to choose components for a Ryzen rig | robert44444uk | Hardware | 50 | 2018-04-07 20:41 |
| 29.2 benchmark help #2 (Ryzen only) | Prime95 | Software | 10 | 2017-05-08 13:24 |
| AMD Ryzen is risin' up. | jasong | Hardware | 11 | 2017-03-02 19:56 |