Intel Xeon Phi - Knights Corner

[BotXXX]

Not sure if it does not need to be moved here http://mersenneforum.org/forumdisplay.php?f=92 ....

Intel released more information about their Xeon Phi coprocessor (which seems to be a result of their Larrabee concept) which can be found on http://www.intel.com/content/www/us/...sor-brief.html
Seeing that it understands x86 code. I am very curious how these cards / coprocessors will function with the various software used by members of this forum. Will we see speed records broken with Prime95 / LLR / any sieving app. And I am also curious when we will see it back on the market - atleast HP, Dell, Cray are likely to introduce products that include the Xeon Phi. Now only to find a filled wallet :)

[Dubslow]

Yes, they are the result of Larrabee, though my friend who works for Intel tells me that the KC/Used-to-be-Larrabee team isn't very smart. When they couldn't get the graphics working, they just ditched it altogether and made it into basically an x86 chip with >=50 cores.

Any sieving should be great, but the LL/R tests aren't very parallelizable.

[ldesnogu]

Originally Posted by BotXXX

Seeing that it understands x86 code.

It doesn't understand all of x86: no MMX/SSE/SSE2/etc. (obviously replaced with a wider SIMD unit), no 32-bit mode, no CMOV. Also gcc has no support for the new SIMD instructions (Intel blame poor the gcc vectorizer implementation).

I also think that the ring bus will be a bottleneck for tasks that need to share a lot of modified data.

[bsquared]

Originally Posted by Dubslow

Yes, they are the result of Larrabee, though my friend who works for Intel tells me that the KC/Used-to-be-Larrabee team isn't very smart. When they couldn't get the graphics working, they just ditched it altogether and made it into basically an x86 chip with >=50 cores.

Any sieving should be great, but the LL/R tests aren't very parallelizable.

"not very smart" doesn't seem like a fair conclusion. Viewed another way, they made a tough business decision and made lemonade from lemons: a highly capable scientific computation co-processor whos ease-of-use opens the possibiliy of mainstream adoption. CUDA programming still requires a different programming approach and often a entirely different structure to the code. If one can gain a factor of 10-50x simply by using pragmas in already working x86 code, and not have to re-write for GPU hardware, that is a big win.

That said, getting the most out of the KC requires adopting their vector registers, which gets more into the territory of re-writing code for custom hardware, and there are other nuances to the hardware that may limit performance gains (that Idesnogu points out). Mainstream adoption will depend on many things, including price point, user support, and widespread demonstrations of performance gains by early adopters.

[ldesnogu]

I'd be very surprised if this ever sees widespread use outside of HPC sites or rendering farms. I guess this will be priced against nVidia Quadro/Tesla Too bad, would love to play with such a beast...

[bsquared]

Originally Posted by ldesnogu

I'd be very surprised if this ever sees widespread use outside of HPC sites or rendering farms. I guess this will be priced against nVidia Quadro/Tesla Too bad, would love to play with such a beast...

I was thinking possibly workstation/server use too. But not desktop/everyday stuff, I agree.

[nucleon]

It smacks of "we burnt all this money on R&D for Larrabee but couldn't get the product we wanted. Lets take the R&D and try and make a product anyhow. Nvidia is doing well with Tesla - lets do something like that. Put minimal effort into getting the product to market and see who's interested. Leverage x86 angle."

But the thing is the x86 angle is toast anyhow. There is nothing concrete until someone makes an order. They are fishing atm. Unless someone is really anti-nvidia, I don't think we'll see deployments of this.

CUDA-based installs have had a few years to get code going. It's unlikely they'll go and do code re-writes now.

-- Craig

[Dubslow]

Originally Posted by nucleon

It smacks of "we burnt all this money on R&D for Larrabee but couldn't get the product we wanted. Lets take the R&D and try and make a product anyhow. Nvidia is doing well with Tesla - lets do something like that. Put minimal effort into getting the product to market and see who's interested. Leverage x86 angle."

That's exactly right.


The thing about x86 though means that it can and will be run completely independently of a "host device" CPU, unlike CUDA. I'm not sure I can recall a source, but I recall reading that it will actually have its own embedded OS through which programs are run -- it is meant to be a truly standalone card.

According to Wikipedia:

Originally Posted by Intel MIC#Knights Corner

In September 2011, it was announced that the Texas Advanced Computing Center (TACC) will use Knights Corner cards in their 10 PetaFLOPS "Stampede" supercomputer, providing 8 PetaFLOPS of the compute power.[2] According to "Stampede: A Comprehensive Petascale Computing Environment" the "second generation Intel (Knights Landing) MICs will be added when they become available, increasing Stampede's aggregate peak performance to at least 15 PetaFLOPS."[20]

As a matter of fact, Greg you said M1061 was being linalg-ed on TACC, right?

[kladner]

Originally Posted by Dubslow

The thing about x86 though means that it can and will be run completely independently of a "host device" CPU, unlike CUDA. I'm not sure I can recall a source, but I recall reading that it will actually have its own embedded OS through which programs are run -- it is meant to be a truly standalone card.

http://www.anandtech.com/show/6017/i...ic-goes-retail

"Xeon Phis will be independently running an embedded form of Linux, which Intel has said will be of particular benefit for cluster users. Drivers of course will still be necessary for a host device to interface with the co-processor, with the implication being that these drivers will be fairly thin and simple since the co-processor itself is already running a full OS."

[petrw1]

Originally Posted by Dubslow

Yes, they are the result of Larrabee, though my friend who works for Intel tells me that the KC/Used-to-be-Larrabee team isn't very smart.

Is this where the name came from?

http://www.imdb.com/character/ch0025506/bio

Would you believe...a secret agent dumber than Maxwell Smart?

[Dubslow]

For developers/George, this and this have been available for two weeks already.

Edit: They have a forum for developers
http://software.intel.com/en-us/foru...tegrated-core/

George, je suis curieux, how well do you think you could get FFTs parallelized like in cuFFT? The latter achieves about 1/5 throughput for LL compared to TF, but since you do the assembly, how much higher do you think you might get that ratio? 1/4? 1/2? Though they'll be expensive, they'll be even faster than CUDA cards.