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#1 |
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Oct 2011
10101001112 Posts |
I just recently ran across a weird problem. I was noticing that P95 was giving Memory allocation errors during S2 P-1 on any value over 4GB. I did searches and found an article talking about how XP had a 2 GB limit and then I searched the internet to see if Vista had a similiar problem. I found that there was one for the 32 bit, but for the 64 bit the option had been removed. This got me to thinking since I used to have 32 bit Vista on here and sure enough, I was running the 32 bit P95. So, I switched tot he 64 bit version and it started using my entire 6GB (out of 8 on board) allotment with no more allocation errors. Now, however, every time the program completes a S2 P-1 I get:
Code:
Problem Event Name: APPCRASH Application Name: prime95.exe Application Version: 26.6.1.0 Application Timestamp: 4d9f7bf8 Fault Module Name: prime95.exe Fault Module Version: 26.6.1.0 Fault Module Timestamp: 4d9f7bf8 Exception Code: c0000005 Exception Offset: 0000000001831c00 OS Version: 6.0.6001.2.1.0.768.3 Locale ID: 1033 Additional Information 1: 468f Additional Information 2: 4cfcce410b3d87a1e7632947e28a6400 Additional Information 3: 6c75 Additional Information 4: 86236f39369b9888cfc0e77f26c32500 |
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#2 |
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Dec 2010
Monticello
5·359 Posts |
I thought that P95 got renamed to P64 when running in 64-bit windows....or did I miss something?
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#3 | |
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Basketry That Evening!
"Bunslow the Bold"
Jun 2011
40<A<43 -89<O<-88
3·29·83 Posts |
Quote:
bcp19, 32 bits means the processor and operating system can only address ~4GB; what you get is actually closer to 3. If you're using 32-bit Vista, you can't run any 64 bit programs. P95 can issue all the commands it wants, but Windows simply cannot handle more than 4GB of memory. Either upgrade to 64 bit Vista or Windows 7. (You also need to have a 64-bit proc, but if you bought it in the last few years it should be.) |
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#4 | ||||
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Basketry That Evening!
"Bunslow the Bold"
Jun 2011
40<A<43 -89<O<-88
3·29·83 Posts |
Some quotes from http://en.wikipedia.org/wiki/64-bit :
Quote:
Quote:
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Quote:
Last fiddled with by Dubslow on 2011-12-02 at 06:24 |
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#5 |
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Romulan Interpreter
Jun 2011
Thailand
3·3,221 Posts |
Good info, a small observation: numbers as 10245 should be read as 1024^5 and so on. Copy/Paste miss (wiki uses its own tex-like editor for formulas, which is copy/paste-dumb).
@Dubslow: you still have time to edit, about 45 miutes, if you are around. |
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#6 | |
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Basketry That Evening!
"Bunslow the Bold"
Jun 2011
40<A<43 -89<O<-88
3·29·83 Posts |
Thanks; I think I got them all. (?)
Edit: Question: Quote:
Conclusion: Each address identifies 8 bits, not one 1 bit. Is this correct? If so, is there no useful information stored on computers that is less than 8 bits = byte? And while we're on the topic... Last fiddled with by Dubslow on 2011-12-02 at 06:29 |
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#7 |
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Romulan Interpreter
Jun 2011
Thailand
3×3,221 Posts |
Correct. See the memory like a matrix, "A x D", with A address-lines and D data-columns (wires). For a 2^20 bytes of memory, you have 8 data wires running from north to south, and 1048576 (2^20) addresses wires, running from east to west. At the intersection of each 2 wires is a small flip-flop that can store a zero or an one. All addresses wires are connected to ground (0) except one which is connected to plus (1), selecting only ONE line at a moment. Then you read the data wires and get your byte. Imagine a village with streets running from east to west (millions of them) and 8 streets running from north to south. At each intersection is a small house with a villager. There is a wolf which can appear at the east on one of the streets, and only the 8 villagers from that street can see him, and they will start running north all 8 at a time.
Do not confuse these (internal) address-lines here, with the 32 (external) address-lines coming out from your processor. That 32 external lines are "demultiplexed" inside of the memory chip, into 2^32 lines, to select ONE and ONLY ONE byte. then you read that byte using the data lines. Well, this in theory. In practice they are multiplexed all together and written/read in a time fashion (same external lines can be used for address writing and data reading, this is where the latency times come, the chip need some time for "internal cooking" when switching from one to the other, etc). Last fiddled with by LaurV on 2011-12-02 at 06:47 |
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#8 |
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Basketry That Evening!
"Bunslow the Bold"
Jun 2011
40<A<43 -89<O<-88
3×29×83 Posts |
Uhhhhh.....
okay. One address is a byte, got it. |
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#9 |
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Dec 2010
Monticello
5×359 Posts |
The address is a byte, until you get into modern embedded processors...where the word size, especially the program word size, might be 18 bits or so (Microchip). Also, I think modern RAM modules and memory busses (on DDR3 for example) return a lot more than 8 bits at a time, like maybe 64 or 128 bits, even if the CPU inside can actually address 8 bits. The rest is cached.
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#10 | |
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Oct 2011
67910 Posts |
Quote:
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#11 |
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Basketry That Evening!
"Bunslow the Bold"
Jun 2011
40<A<43 -89<O<-88
3·29·83 Posts |
Oh. My bad. Sorry
It did seem like too easy an answer. |
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