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#2619 | |
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If I May
"Chris Halsall"
Sep 2002
Barbados
100110000000102 Posts |
Quote:
As I discovered during this exercise, tuning your CPUs to your caches, and your memory, can increase your throughput significantly. |
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#2620 |
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Dec 2002
2×11×37 Posts |
Well, I would like to know for example if it would make sense to use a X79 based motherboard. It has a quad channel memory instead of a dual channel memory. Does anyone have one?
I see serious differences between systems with identical processors. That may be just different memory speeds. If a 2,0 Ghz Xeon can outpace an ordinary quad core running at 2,4 Ghz by such a wide margin, I would like to know which component contributes what to the final results. |
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#2621 |
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May 2013
East. Always East.
32778 Posts |
Oh no no I didn't mean that. I thought this discussion was about the bits moving between components (i.e. between the RAM and CPU). I know full well the importance of the RAM bandwidth (I need 20% faster RAM to unbottleneck myself, as a matter of fact)
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#2622 | |
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"Mr. Meeseeks"
Jan 2012
California, USA
23×271 Posts |
Quote:
This is about that, what else? RAM moving within RAM?
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#2623 |
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May 2013
East. Always East.
11·157 Posts |
I donno. The connections between the RAM and the CPU? Like the actual electrical signals moving across the board? To be fair I didn't exactly understand what the question meant.
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#2624 |
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"Mr. Meeseeks"
Jan 2012
California, USA
23·271 Posts |
Now I'm confused too
. Memory bandwidth is the memory moved from RAM to CPU, CPU to RAM, (chipset, HDD, blah blah)Please tell me if I'm wrong, I'm not exactly the most knowing in this area. |
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#2625 |
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Romulan Interpreter
Jun 2011
Thailand
7×1,373 Posts |
Memory bandwidth is when bits move inside of my computers.
Blah blah blah is when bits move inside of your computers. No matter from which component to which.. |
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#2626 |
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Jun 2013
107 Posts |
I think he's meaning latency between RAM and CPU (not the bandwidth), id est the fact that the signal can only travel at c (which is not an issue) and not the actual amount of data that can be transmitted in any given time.
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#2627 |
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Just call me Henry
"David"
Sep 2007
Cambridge (GMT/BST)
23×3×5×72 Posts |
Memory bandwidth is the total data throughput of the connection between ram and the cpu.
On a fast cpu it is possible to saturate this with only 3 cores. In this case four 3 Ghz cores would run as fast as four 4 Ghz cores because the memory bandwidth can only handle 12 Ghz of throughput in total. The cpu caches have much higher bandwidth than ram but are usually way too small. In the haswells there are a few chips with suffix R that have 128MB of eDRAM built into them as L4 cache. This has very high bandwidth but is not large enough for the tests done by GIMPS currently(for 4 tests at least). LLR tests could benefit massively as they are in general smaller and will fit in it. Latency doesn't really matter that much for GIMPS because of the way it is optimized. |
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#2628 |
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If I May
"Chris Halsall"
Sep 2002
Barbados
2×5×7×139 Posts |
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#2629 |
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Just call me Henry
"David"
Sep 2007
Cambridge (GMT/BST)
23·3·5·72 Posts |
The difference between cache and ram might be worthwhile but the difference between 9-9-9-27 and 8-8-8-24 isn't very big.
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