mersenneforum.org  

Go Back   mersenneforum.org > Great Internet Mersenne Prime Search > Hardware

Reply
 
Thread Tools
Old 2019-02-07, 03:47   #265
retina
Undefined
 
retina's Avatar
 
"The unspeakable one"
Jun 2006
My evil lair

6,793 Posts
Default

Quote:
Originally Posted by ewmayer View Post
OK, fine - let initial shift = s, thus initial LL-test seed = 4*2^s.

Iteration 1 gives (4^2-2)*2^2s (mod 2^p-1) = 14*2^(2s % p).
Yes, of course. But easy cheats like that are of no value when comparing results.

Look ma, I computed a full iteration of a 1000T test in 0.000001 seconds.

Doesn't tell us anything. We can't extrapolate an expected runtime from that.
retina is offline   Reply With Quote
Old 2019-02-07, 03:53   #266
ewmayer
2ω=0
 
ewmayer's Avatar
 
Sep 2002
República de California

101101111011002 Posts
Default

You said "A proper complete iteration of the full 100M value", which is just what I gave - my formula works for any shift count you like. So where's the cheat?

(Yes, I know what you *mean*, I just want you to *say* what you mean. :)
ewmayer is offline   Reply With Quote
Old 2019-02-07, 04:24   #267
retina
Undefined
 
retina's Avatar
 
"The unspeakable one"
Jun 2006
My evil lair

679310 Posts
Default

Quote:
Originally Posted by ewmayer View Post
(Yes, I know what you *mean*, I just want you to *say* what you mean. :)
Sorry
retina is offline   Reply With Quote
Old 2019-02-07, 14:36   #268
kriesel
 
kriesel's Avatar
 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest

24·3·163 Posts
Default

Something I've thought about from time to time and it comes up as questions by others, is beginning at iteration small x>0 with a precomputed interim term. For LL, seed of 4, iteration 1 14, iteration 2 194, etc, and it almost doubles in number of bits per iteration, so iteration 3, 37634, 16 bits, still fits in a single word and is far shorter than the mod n for any reasonable sized exponent. So begin with 37634 and the next iteration is called 4. There's an equivalent in PRP3. Saving a few iterations is usually dismissed as not worth the bother, at current exponents.

Yes, as a fraction of the work it's tiny, only ~3/100M saved, 30ppb. There are around 400,000 exponents to primality test within 10% of 100M, times two each; 800,000. It adds up to about 0.024 primality tests saved over that span. Step and repeat over additional exponent spans, and the tiny savings add up overall, theoretically, ignoring erasure of some by people quitting, and the savings being distributed over the many participants. Seems like a tiny but fast and straightforward tweak to implement. But it does not result in somewhere an additional primality test being completed, because the savings are divided up among too many systems and workers. (Maybe it results in additional factoring, but even that seems unlikely.) Results are reached a tiny bit sooner. Over a year's time, 30ppb is ~1 second. I just spent centuries worth of the savings estimating and describing it.

(If one was doing 64 bit unsigned int math, it could go to iteration 5.
In a variable length representation, the initial iterations are only a single word long so the net effect is much much less.) This is also why the first 5 iterations' res64 values are independent of exponent>64. In hex:
seed 4
1 E
2 C2
3 9302
4 546B 4C02
5 1BD6 96D9 F03D 3002
So, it seems, in the existing software, one could consider adding this test. After the first 5 iterations, for any sizable exponent and any shift, generate the res64, and test for a match. If not a match, there was excessive round-off or some other error, perhaps an initialization error or memory. I wonder if any existing software does that, or if the code wizards have determined it would detect an error so rarely it is a waste of time. It could perhaps save some novice user from a long wasted run with too small an fft length, but only if roundoff or other error may have a detectable effect this early. Probably if there was something to be gained George and Ernst would be doing it already. I'd find interesting an answer as to why it's not worthwhile. It might be useful in the gpu arena, such as CUDALucas, where some configurations with some gpu models produce wrong residues from the start.

Last fiddled with by kriesel on 2019-02-07 at 14:53
kriesel is online now   Reply With Quote
Old 2019-03-25, 19:53   #269
M344587487
 
M344587487's Avatar
 
"Composite as Heck"
Oct 2017

11101101102 Posts
Default Radeon VII

Single worker quick (sclk=1800, mclk=1200, fan=jet_engine, ~240W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 18:05:40 gpuowl 6.2-3a95f98-mod
2019-03-25 18:05:40 -device 0 
2019-03-25 18:05:40 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:05:40 using short carry kernels
2019-03-25 18:05:42 OpenCL compilation in 1931 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"
2019-03-25 18:05:44 332220523.owl not found, starting from the beginning.
2019-03-25 18:05:50 332220523 OK      800  0.00%; 3.39 ms/sq; ETA 13d 00:30; b950798999630b08 (check 1.74s)
2019-03-25 18:06:21 332220523       10000  0.00%; 3.39 ms/sq; ETA 13d 00:58; 503cd91d7b8e30e5
2019-03-25 18:06:55 332220523       20000  0.01%; 3.39 ms/sq; ETA 13d 00:43; f2d3ffbb3586c527
2019-03-25 18:07:29 332220523       30000  0.01%; 3.39 ms/sq; ETA 13d 00:40; e7846100baf7ce53
2019-03-25 18:08:03 332220523       40000  0.01%; 3.39 ms/sq; ETA 13d 00:42; e305c82567149969
2019-03-25 18:08:37 332220523       50000  0.02%; 3.39 ms/sq; ETA 13d 00:38; 72885d5ee0a11128
Single worker efficient (sclk=1547, mclk=1200, fan=reasonable, ~170W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 17:59:57 gpuowl 6.2-3a95f98-mod
2019-03-25 17:59:57 -device 0
2019-03-25 17:59:57 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 17:59:57 using short carry kernels
2019-03-25 17:59:59 OpenCL compilation in 1933 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:00:01 332220523.owl not found, starting from the beginning.
2019-03-25 18:00:07 332220523 OK      800  0.00%; 3.66 ms/sq; ETA 14d 01:52; b950798999630b08 (check 1.85s)                                                                                                       
2019-03-25 18:00:41 332220523       10000  0.00%; 3.67 ms/sq; ETA 14d 02:17; 503cd91d7b8e30e5
2019-03-25 18:01:18 332220523       20000  0.01%; 3.66 ms/sq; ETA 14d 02:03; f2d3ffbb3586c527
2019-03-25 18:01:54 332220523       30000  0.01%; 3.66 ms/sq; ETA 14d 02:10; e7846100baf7ce53
2019-03-25 18:02:31 332220523       40000  0.01%; 3.66 ms/sq; ETA 14d 01:56; e305c82567149969
2019-03-25 18:03:07 332220523       50000  0.02%; 3.66 ms/sq; ETA 14d 02:05; 72885d5ee0a11128
Multiple worker efficient (sclk=1547, mclk=1200, fan=reasonable, ~180W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 18:11:13 gpuowl 6.2-3a95f98-mod
2019-03-25 18:11:13 -device 0
2019-03-25 18:11:13 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:11:13 using short carry kernels
2019-03-25 18:11:15 OpenCL compilation in 2010 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:11:16 332220523.owl not found, starting from the beginning.
2019-03-25 18:11:27 332220523 OK      800  0.00%; 7.06 ms/sq; ETA 27d 03:24; b950798999630b08 (check 2.85s)                                                                                                       
2019-03-25 18:12:32 332220523       10000  0.00%; 7.07 ms/sq; ETA 27d 04:32; 503cd91d7b8e30e5
2019-03-25 18:13:43 332220523       20000  0.01%; 7.07 ms/sq; ETA 27d 04:29; f2d3ffbb3586c527
2019-03-25 18:14:53 332220523       30000  0.01%; 7.08 ms/sq; ETA 27d 05:14; e7846100baf7ce53
2019-03-25 18:16:04 332220523       40000  0.01%; 7.07 ms/sq; ETA 27d 04:44; e305c82567149969
2019-03-25 18:17:15 332220523       50000  0.02%; 7.06 ms/sq; ETA 27d 03:50; 72885d5ee0a11128

───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
amdcube@amdcube:~/Documents/git/gpuowl4$ ./openowl -device 0
2019-03-25 18:11:14 gpuowl 6.2-3a95f98-mod
2019-03-25 18:11:14 -device 0
2019-03-25 18:11:14 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:11:14 using short carry kernels
2019-03-25 18:11:16 OpenCL compilation in 2018 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:11:18 332220523.owl not found, starting from the beginning.
2019-03-25 18:11:30 332220523 OK      800  0.00%; 6.62 ms/sq; ETA 25d 11:09; b950798999630b08 (check 3.18s)                                                                                                       
2019-03-25 18:12:35 332220523       10000  0.00%; 7.08 ms/sq; ETA 27d 05:06; 503cd91d7b8e30e5
2019-03-25 18:13:46 332220523       20000  0.01%; 7.08 ms/sq; ETA 27d 04:55; f2d3ffbb3586c527
2019-03-25 18:14:56 332220523       30000  0.01%; 7.08 ms/sq; ETA 27d 05:16; e7846100baf7ce53
2019-03-25 18:16:07 332220523       40000  0.01%; 7.07 ms/sq; ETA 27d 04:45; e305c82567149969
2019-03-25 18:17:18 332220523       50000  0.02%; 7.06 ms/sq; ETA 27d 03:53; 72885d5ee0a11128
An effective rate of ~3.54 ms/it at ~180W, questionable whether being slightly less efficient for slightly higher throughput is worth running two instances simultaneously.
M344587487 is offline   Reply With Quote
Old 2019-03-26, 08:57   #270
Lorenzo
 
Lorenzo's Avatar
 
Aug 2010
Republic of Belarus

2628 Posts
Default

Quote:
3.39 ms/sq; ETA 13d
Wow!!! This is absolutely amazing! Top card with a reasonable price.
Lorenzo is offline   Reply With Quote
Old 2019-06-18, 18:27   #271
mnd9
 
Jun 2019
Boston, MA

478 Posts
Default

Quote:
Originally Posted by M344587487 View Post
Single worker quick (sclk=1800, mclk=1200, fan=jet_engine, ~240W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 18:05:40 gpuowl 6.2-3a95f98-mod
2019-03-25 18:05:40 -device 0 
2019-03-25 18:05:40 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:05:40 using short carry kernels
2019-03-25 18:05:42 OpenCL compilation in 1931 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"
2019-03-25 18:05:44 332220523.owl not found, starting from the beginning.
2019-03-25 18:05:50 332220523 OK      800  0.00%; 3.39 ms/sq; ETA 13d 00:30; b950798999630b08 (check 1.74s)
2019-03-25 18:06:21 332220523       10000  0.00%; 3.39 ms/sq; ETA 13d 00:58; 503cd91d7b8e30e5
2019-03-25 18:06:55 332220523       20000  0.01%; 3.39 ms/sq; ETA 13d 00:43; f2d3ffbb3586c527
2019-03-25 18:07:29 332220523       30000  0.01%; 3.39 ms/sq; ETA 13d 00:40; e7846100baf7ce53
2019-03-25 18:08:03 332220523       40000  0.01%; 3.39 ms/sq; ETA 13d 00:42; e305c82567149969
2019-03-25 18:08:37 332220523       50000  0.02%; 3.39 ms/sq; ETA 13d 00:38; 72885d5ee0a11128
Single worker efficient (sclk=1547, mclk=1200, fan=reasonable, ~170W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 17:59:57 gpuowl 6.2-3a95f98-mod
2019-03-25 17:59:57 -device 0
2019-03-25 17:59:57 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 17:59:57 using short carry kernels
2019-03-25 17:59:59 OpenCL compilation in 1933 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:00:01 332220523.owl not found, starting from the beginning.
2019-03-25 18:00:07 332220523 OK      800  0.00%; 3.66 ms/sq; ETA 14d 01:52; b950798999630b08 (check 1.85s)                                                                                                       
2019-03-25 18:00:41 332220523       10000  0.00%; 3.67 ms/sq; ETA 14d 02:17; 503cd91d7b8e30e5
2019-03-25 18:01:18 332220523       20000  0.01%; 3.66 ms/sq; ETA 14d 02:03; f2d3ffbb3586c527
2019-03-25 18:01:54 332220523       30000  0.01%; 3.66 ms/sq; ETA 14d 02:10; e7846100baf7ce53
2019-03-25 18:02:31 332220523       40000  0.01%; 3.66 ms/sq; ETA 14d 01:56; e305c82567149969
2019-03-25 18:03:07 332220523       50000  0.02%; 3.66 ms/sq; ETA 14d 02:05; 72885d5ee0a11128
Multiple worker efficient (sclk=1547, mclk=1200, fan=reasonable, ~180W rocm-smi power figure):
Code:
amdcube@amdcube:~/Documents/git/gpuowl3$ ./openowl -device 0
2019-03-25 18:11:13 gpuowl 6.2-3a95f98-mod
2019-03-25 18:11:13 -device 0
2019-03-25 18:11:13 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:11:13 using short carry kernels
2019-03-25 18:11:15 OpenCL compilation in 2010 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:11:16 332220523.owl not found, starting from the beginning.
2019-03-25 18:11:27 332220523 OK      800  0.00%; 7.06 ms/sq; ETA 27d 03:24; b950798999630b08 (check 2.85s)                                                                                                       
2019-03-25 18:12:32 332220523       10000  0.00%; 7.07 ms/sq; ETA 27d 04:32; 503cd91d7b8e30e5
2019-03-25 18:13:43 332220523       20000  0.01%; 7.07 ms/sq; ETA 27d 04:29; f2d3ffbb3586c527
2019-03-25 18:14:53 332220523       30000  0.01%; 7.08 ms/sq; ETA 27d 05:14; e7846100baf7ce53
2019-03-25 18:16:04 332220523       40000  0.01%; 7.07 ms/sq; ETA 27d 04:44; e305c82567149969
2019-03-25 18:17:15 332220523       50000  0.02%; 7.06 ms/sq; ETA 27d 03:50; 72885d5ee0a11128

───────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────
amdcube@amdcube:~/Documents/git/gpuowl4$ ./openowl -device 0
2019-03-25 18:11:14 gpuowl 6.2-3a95f98-mod
2019-03-25 18:11:14 -device 0
2019-03-25 18:11:14 332220523 FFT 18432K: Width 256x4, Height 256x4, Middle 9; 17.60 bits/word
2019-03-25 18:11:14 using short carry kernels
2019-03-25 18:11:16 OpenCL compilation in 2018 ms, with "-DEXP=332220523u -DWIDTH=1024u -DSMALL_HEIGHT=1024u -DMIDDLE=9u  -I. -cl-fast-relaxed-math -cl-std=CL2.0"                                                
2019-03-25 18:11:18 332220523.owl not found, starting from the beginning.
2019-03-25 18:11:30 332220523 OK      800  0.00%; 6.62 ms/sq; ETA 25d 11:09; b950798999630b08 (check 3.18s)                                                                                                       
2019-03-25 18:12:35 332220523       10000  0.00%; 7.08 ms/sq; ETA 27d 05:06; 503cd91d7b8e30e5
2019-03-25 18:13:46 332220523       20000  0.01%; 7.08 ms/sq; ETA 27d 04:55; f2d3ffbb3586c527
2019-03-25 18:14:56 332220523       30000  0.01%; 7.08 ms/sq; ETA 27d 05:16; e7846100baf7ce53
2019-03-25 18:16:07 332220523       40000  0.01%; 7.07 ms/sq; ETA 27d 04:45; e305c82567149969
2019-03-25 18:17:18 332220523       50000  0.02%; 7.06 ms/sq; ETA 27d 03:53; 72885d5ee0a11128
An effective rate of ~3.54 ms/it at ~180W, questionable whether being slightly less efficient for slightly higher throughput is worth running two instances simultaneously.
Can you explain how you're able to get such higher throughput on this $700 consumer gaming GPU than others have been able to achieve using NVIDIA server GPUs with much higher compute that cost up to $10K? I may have missed this elsewhere in the thread, but do you mind sharing the other specs of your rig?

I assume the benchmark numbers posted on mersenne.ca/cudalucas.php for the radeon vii are from you, and it clearly blows all of the competition out of the water, especially for its price (JVR2 is almost 4x the next best GPU).

I think you've made a massive achievement, and I'd like to learn more!
mnd9 is offline   Reply With Quote
Old 2019-06-19, 08:22   #272
M344587487
 
M344587487's Avatar
 
"Composite as Heck"
Oct 2017

16668 Posts
Default

Quote:
Originally Posted by mnd9 View Post
Can you explain how you're able to get such higher throughput on this $700 consumer gaming GPU than others have been able to achieve using NVIDIA server GPUs with much higher compute that cost up to $10K? I may have missed this elsewhere in the thread, but do you mind sharing the other specs of your rig?

I assume the benchmark numbers posted on mersenne.ca/cudalucas.php for the radeon vii are from you, and it clearly blows all of the competition out of the water, especially for its price (JVR2 is almost 4x the next best GPU).

I think you've made a massive achievement, and I'd like to learn more!
It's not my achievement really, AMD've just made a compute monster and are selling at a price that is well below what the compute power suggests is reasonable. There are a few reasons for this:
  • They are marketing it as a gaming card, and as a gaming card it is mediocre at the $700 price point
  • Releasing it as a gaming card may not have been the primary plan, they needed a stop-gap as Navi had been delayed
  • Most pros are locked into CUDA so an OpenCL-only card is not even an option for much of the compute market
  • The DP performance and high bandwidth HBM2 is so suited to our niche it's nuts

I and preda at least contributed to the mersenne.ca result which is at stock settings. This thread contains me fumbling through testing the card to make it more efficient: https://www.mersenneforum.org/showth...461#post511461


The specs of my machine are not really relevant, technically every million iterations there is a GEC check that is done on the CPU but it takes a very small amount of the total test time to complete and is not part of the benchmarks. Testing was done on a Ryzen 1700 and am in the process of tearing my hair out trying to get an intel celeron dual core ex-mining motherboard setup running.
M344587487 is offline   Reply With Quote
Old 2019-06-19, 11:59   #273
hansl
 
hansl's Avatar
 
Apr 2019

5×41 Posts
Default

The craziest thing about it is that the its basically the same core as their server grade Instinct MI50/MI60, which are capable of 2x that double precision performance, its only nerfed on the VII so they aren't undercutting themselves(although you could easily buy 2 or more VII's for the cost of those).

Its been mentioned that AMD changed this in BIOS, so there is speculation that some future hack could enable ALL the compute! Although I've also read that their bios images are digitally signed, so it may never happen depending on how strong that check is.

I wonder what sort of signing is done or how quickly a VII could theoretically crack its own protection
hansl is offline   Reply With Quote
Old 2019-06-19, 13:06   #274
nomead
 
nomead's Avatar
 
"Sam Laur"
Dec 2018
Turku, Finland

317 Posts
Default

Quote:
Originally Posted by hansl View Post
Its been mentioned that AMD changed this in BIOS, so there is speculation that some future hack could enable ALL the compute! Although I've also read that their bios images are digitally signed, so it may never happen depending on how strong that check is.
Though I suspect it wouldn't matter much with PRP workloads. I think it's already memory bottlenecked now, even with the HBM2 memory...

For other compute loads, of course.
nomead is offline   Reply With Quote
Old 2019-07-16, 17:19   #275
kriesel
 
kriesel's Avatar
 
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest

24×3×163 Posts
Default

Quote:
Originally Posted by hansl View Post
The craziest thing about it is that the its basically the same core as their server grade Instinct MI50/MI60, which are capable of 2x that double precision performance, its only nerfed on the VII so they aren't undercutting themselves(although you could easily buy 2 or more VII's for the cost of those).
All I found for MI** in a recent search was an MI25 for $3600. USED. on Amazon.
Quote:
Its been mentioned that AMD changed this in BIOS, so there is speculation that some future hack could enable ALL the compute! Although I've also read that their bios images are digitally signed, so it may never happen depending on how strong that check is.


I wonder what sort of signing is done or how quickly a VII could theoretically crack its own protection
It could be they saved up a pile of defective MI50/60 chips, and created a new model using the functional portions of defective chips. There's a long tradition of doing that sort of thing in the computing industry. (See the early Intel 486SX). Once the pile of partly functional chips is used up, the run ends. It's sensible, efficient, and environmentally sound.
kriesel is online now   Reply With Quote
Reply



Similar Threads
Thread Thread Starter Forum Replies Last Post
Perpetual benchmark thread... Xyzzy Hardware 897 2023-06-15 13:46
Sieve Benchmark Thread Historian Twin Prime Search 105 2013-02-05 01:35
LLR benchmark thread Oddball Riesel Prime Search 5 2010-08-02 00:11
sr5sieve Benchmark thread axn Sierpinski/Riesel Base 5 25 2010-05-28 23:57
Old Hardware Thread E_tron Hardware 0 2004-06-18 03:32

All times are UTC. The time now is 16:29.


Fri Jul 7 16:29:09 UTC 2023 up 323 days, 13:57, 0 users, load averages: 2.52, 2.19, 1.81

Powered by vBulletin® Version 3.8.11
Copyright ©2000 - 2023, Jelsoft Enterprises Ltd.

This forum has received and complied with 0 (zero) government requests for information.

Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation.
A copy of the license is included in the FAQ.

≠ ± ∓ ÷ × · − √ ‰ ⊗ ⊕ ⊖ ⊘ ⊙ ≤ ≥ ≦ ≧ ≨ ≩ ≺ ≻ ≼ ≽ ⊏ ⊐ ⊑ ⊒ ² ³ °
∠ ∟ ° ≅ ~ ‖ ⟂ ⫛
≡ ≜ ≈ ∝ ∞ ≪ ≫ ⌊⌋ ⌈⌉ ∘ ∏ ∐ ∑ ∧ ∨ ∩ ∪ ⨀ ⊕ ⊗ 𝖕 𝖖 𝖗 ⊲ ⊳
∅ ∖ ∁ ↦ ↣ ∩ ∪ ⊆ ⊂ ⊄ ⊊ ⊇ ⊃ ⊅ ⊋ ⊖ ∈ ∉ ∋ ∌ ℕ ℤ ℚ ℝ ℂ ℵ ℶ ℷ ℸ 𝓟
¬ ∨ ∧ ⊕ → ← ⇒ ⇐ ⇔ ∀ ∃ ∄ ∴ ∵ ⊤ ⊥ ⊢ ⊨ ⫤ ⊣ … ⋯ ⋮ ⋰ ⋱
∫ ∬ ∭ ∮ ∯ ∰ ∇ ∆ δ ∂ ℱ ℒ ℓ
𝛢𝛼 𝛣𝛽 𝛤𝛾 𝛥𝛿 𝛦𝜀𝜖 𝛧𝜁 𝛨𝜂 𝛩𝜃𝜗 𝛪𝜄 𝛫𝜅 𝛬𝜆 𝛭𝜇 𝛮𝜈 𝛯𝜉 𝛰𝜊 𝛱𝜋 𝛲𝜌 𝛴𝜎𝜍 𝛵𝜏 𝛶𝜐 𝛷𝜙𝜑 𝛸𝜒 𝛹𝜓 𝛺𝜔