DDR4, Is This Old News?

[M29]

Stumbled across this article: DDR4 Memory Will Be Released By Next Month.

Also, no more dual channel?

And the specification.

[kladner]

Originally Posted by M29

Stumbled across this article: DDR4 Memory Will Be Released By Next Month.

**Also, no more dual channel?**

And the specification.

**Is quad channel a disadvantage? Between the speed increase, and more channels, it would seem to offer the possibility of laying memory bottlenecks to rest, at least for the current generation of processors.

[Aramis Wyler]

I don't have any good technical reasons to be concerned, but I get the impression that with quad channel memory you can't have more than one dimm per core, which was not the case with dual channel. Probably doesn't matter for us since we're probably all hitting four or more cores simultaneously anyway, but I wonder a little if there aren't some moments when with dual channel a core might actually pull from both dimms simultaneously, and that won't be possible now.

Basically I'm afraid that even with double the memory bandwidth, the restriction will only precipitate a different kind of bottleneck.

[kladner]

I get the feeling that I am misinterpreting the "dual" and "quad" channel labels. By your description, Aramis, they don't function in the same way.

[firejuggler]

single channel : one road : data can only go up or down
dual : one route up, one down
quad : 2 up, 2 down (at the same time).

also DDR4 <> GDDR5 (on GPU)

[fivemack]

Originally Posted by Aramis Wyler

I don't have any good technical reasons to be concerned, but I get the impression that with quad channel memory you can't have more than one dimm per core, which was not the case with dual channel.

You can't have more than one DIMM per channel - every system will be like the cheaper X79 boards where there are precisely four memory slots and best performance requires populating all of them.

But the channels aren't attached to processor cores in a one-to-one way; the memory requests all go round the internal ring-bus and pick the channel that's attached to the memory module in which the cache line you're trying to act on is.

(Haswell-E is likely to have eight cores and four channels)

[ewmayer]

Intel set to bring next-gen DDR4 DRAM memory to computers later this year

Intel will add support for DDR4 memory to its high-end computers in the third quarter, sources familiar with the company’s plans said.

The new DDR4 memory, which has been under development for more than five years, will speed up computer performance while reducing power consumption. It will also mean a progressive slowdown in the adoption of DDR3 memory, which currently goes into most laptops, tablets and servers.

The adoption of DDR4 by chip makers at the motherboard and chip level is the first step to bringing the new memory type to computers. DDR4 chip support will come with Intel’s next-generation Xeon server processors code-named Grantley, which will be based on the Haswell architecture, to be released in the third quarter, sources said.