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2016-03-29, 23:52
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#1 |
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P90 years forever!
Aug 2002
Yeehaw, FL
7,351 Posts |
Prime95 version 28.9 / 28.10
Prime95 version 28.9 build 2 is available. From whatsnew.txt:
Code:
1) Since GPUs are so much better at trial factoring than CPUs, benchmarking no longer times
mprime's trial factoring by default. Two new benchmarking options are available:
OnlyBenchThroughput and OnlyBenchMaxCPUs. See undoc.txt for details.
2) Slightly reduced the memory bandwidth requirements for several large FFTs. May lead to
about a 1% speed increase for users testing 100 million digit numbers.
3) If running more than one worker, prime95 looks for any sin/cos data that it can share among
the workers. Depending on the FFT sizes you are running, this could lead to a very slight
reduction in needed memory bandwidth.
4) Method for choosing the best FFT implementation changed. In previous versions, the FFT
implementation that resulted in the fastest single worker timing was used. In this version
the FFT implementation that had the best throughput was selected. For FMA3 FFTs I used a
4-core Skylake to measure best throughput. For AVX FFTs I used a 4-core Sandy Bridge
to measure best throughput. Not many FFTs were affected, but you may see a few percent
variation in throughput with this version.
5) Improved AVX2 trial factoring in 64-bit executable. Trial factoring should still be done
on a GPU. A GPU is on the order of 100 times more efficient at trial factoring than a CPU!!!
6) Trial factoring now defines one "iteration" as processing 128KB of sieve, or 1M possible
factors. In previous versions an iteration was defined as 16KB of sieve in 32-bit executables
and 48KB in 64-bit executables. The trial factoring benchmark still times processing 16KB of sieve.
7) Trial factoring in 64-bit executables is now multi-threaded.
8) On initial install, the default settings for number of workers will be set to
the number of cores / 4 with multithreading turned on.
9) The worker windows menu choice now enforces a minimum number of multi-threaded cores for some
work types to ensure timely completion of assignments. Also, the worker windows menu choice
no longer allows assigning work to hyperthreads (they are rarely beneficial in mprime).
This behavior can be overridden with the ConfigureHyperthreads undoc.txt feature.
Download links: Windows 64-bit: ftp://mersenne.org/gimps/p95v2810.win64.zip Linux 64-bit: ftp://mersenne.org/gimps/p95v2810.linux64.tar.gz Mac OS X: ftp://mersenne.org/gimps/p95v289.MacOSX.zip FreeBSD 10 64-bit: ftp://mersenne.org/gimps/p95v289.FreeBSD10-64.tar.gz (not ready yet) Windows 32-bit: ftp://mersenne.org/gimps/p95v2810.win32.zip Linux 32-bit: ftp://mersenne.org/gimps/p95v2810.linux32.tar.gz Source: ftp://mersenne.org/gimps/p95v2810.source.zip (not ready yet) Last fiddled with by Prime95 on 2016-11-01 at 17:52 |
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2016-03-29, 23:53
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#2 |
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P90 years forever!
Aug 2002
Yeehaw, FL
162678 Posts |
1. Crash is possible when multithreading TF. Fixed in 28.10.
2. Results are not saved when a SIGHUP signal is received. Fixed in 28.10. 3. If a termination signal is received while mprime is awaiting user input from the menus or dialogs, then mprime does not terminate. Fixed in 28.10. 4. There is an intermittent bug in calculating how long an LL test takes to complete. This can trigger unwanted unreserving of exponents. This bug IS NOT fixed. There is a new undoc.txt option, UnreserveExponents, which will protect 99.9% of users from this bug. This new option is implemented in 28.10. 5. SSE2 torture test generated random errors and crashes. Fixed in 28.10. 6. Multithreaded PRP tests can produce incorrect results. The number being tested must generate carries into more than 4 FFT words - this happens for larger k,b,c combinations testing k*b^n+c. It also only happens for FFTs with a quantity that I call "cache line multiplier" (clm) is one. There is no way to tell if clm is one other than by looking at the mult.asm source code. Fixed in gwnum 28.12 and prime95 29.1 build 10. Last fiddled with by Prime95 on 2017-02-18 at 05:29 |
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2016-03-29, 23:59
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#3 |
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P90 years forever!
Aug 2002
Yeehaw, FL
7,351 Posts |
You'll note in the whatsnew that I used a different method for choosing the best FFT implementation. Interestingly, on my Skylake system the 4M FFT now get more throughput running with four threads than running four single-threaded workers.
My Sandy Bridge system still runs better single-threaded. I'm curious what changes y'all see in throughput. I use these options in prime.txt (feel free to try more FFT sizes than 4M): Code:
MinBenchFFT=4096 MaxBenchFFT=4096 BenchTime=30 BenchMultithreads=1 OnlyBenchThroughput=1 OnlyBenchMaxCPUs=1 OnlyBench5678=0 BenchAllComplex=0 |
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2016-03-30, 01:51
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#4 | |
"Kieren"
Jul 2011
In My Own Galaxy!
1015610 Posts |
Quote:
Compare your results to other computers at http://www.mersenne.org/report_benchmarks AMD FX(tm)-8350 Eight-Core Processor CPU speed: 4000.00 MHz, 8 cores CPU features: 3DNow! Prefetch, SSE, SSE2, SSE4, AVX, FMA L1 cache size: 16 KB L2 cache size: 2 MB, L3 cache size: 8 MB L1 cache line size: 64 bytes L2 cache line size: 64 bytes L1 TLBS: 64 L2 TLBS: 1024 Prime95 64-bit version 28.9, RdtscTiming=1 Timings for 4096K FFT length (8 cpus, 1 worker): 13.32 ms. Throughput: 75.07 iter/sec. Timings for 4096K FFT length (8 cpus, 2 workers): 25.03, 24.89 ms. Throughput: 80.13 iter/sec. Timings for 4096K FFT length (8 cpus, 4 workers): 46.41, 48.23, 49.91, 45.72 ms. Throughput: 84.19 iter/sec. Timings for 4096K FFT length (8 cpus, 8 workers): 90.94, 88.40, 90.99, 91.99, 88.38, 94.63, 90.25, 90.02 ms. Throughput: 88.24 iter/sec. FWIW: The FX-8350 actually has L2 caches of 2048KB x 4. That is, 2MB L2 for each of the 4 [2 integer units, 1 FPU] groups. I don't know if this detection makes any difference in the way the program runs. The L1 I-cache is also x4, which makes another good argument for treating this chip as a quad when running P95. Last fiddled with by kladner on 2016-03-30 at 02:51 |
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2016-03-30, 09:55
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#5 |
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Einyen
Dec 2003
Denmark
5×607 Posts |
Haswell-E 5960X:
Code:
Prime95 28.7 build 1 Prime95 28.9 build 2 Timings for 2048K FFT length (8 cpus, 1 worker): Throughput: 830.76 iter/sec. Throughput: 810.55 iter/sec. Timings for 2048K FFT length (8 cpus, 2 workers): Throughput: 747.78 iter/sec. Throughput: 756.74 iter/sec. Timings for 2048K FFT length (8 cpus, 4 workers): Throughput: 726.44 iter/sec. Throughput: 730.66 iter/sec. Timings for 2048K FFT length (8 cpus, 8 workers): Throughput: 726.48 iter/sec. Throughput: 740.79 iter/sec. Timings for 3072K FFT length (8 cpus, 1 worker): Throughput: 523.80 iter/sec. Throughput: 526.75 iter/sec. Timings for 3072K FFT length (8 cpus, 2 workers): Throughput: 478.93 iter/sec. Throughput: 487.17 iter/sec. Timings for 3072K FFT length (8 cpus, 4 workers): Throughput: 479.19 iter/sec. Throughput: 487.56 iter/sec. Timings for 3072K FFT length (8 cpus, 8 workers): Throughput: 483.86 iter/sec. Throughput: 488.03 iter/sec. Timings for 4096K FFT length (8 cpus, 1 worker): Throughput: 360.31 iter/sec. Throughput: 369.94 iter/sec. Timings for 4096K FFT length (8 cpus, 2 workers): Throughput: 335.23 iter/sec. Throughput: 358.31 iter/sec. Timings for 4096K FFT length (8 cpus, 4 workers): Throughput: 352.46 iter/sec. Throughput: 359.27 iter/sec. Timings for 4096K FFT length (8 cpus, 8 workers): Throughput: 355.22 iter/sec. Throughput: 361.74 iter/sec. Timings for 4608K FFT length (8 cpus, 1 worker): Throughput: 323.82 iter/sec. Throughput: 322.00 iter/sec. Timings for 4608K FFT length (8 cpus, 2 workers): Throughput: 303.35 iter/sec. Throughput: 314.77 iter/sec. Timings for 4608K FFT length (8 cpus, 4 workers): Throughput: 318.59 iter/sec. Throughput: 319.50 iter/sec. Timings for 4608K FFT length (8 cpus, 8 workers): Throughput: 320.56 iter/sec. Throughput: 320.31 iter/sec. 28.7 build 1: Between 2.373 ms/iter and 2.388 ms/iter: Throughput: 418 iter/sec to 421 iter/sec 28.9 build 2: Between 2.346 ms/iter and 2.368 ms/iter: Throughput: 422 iter/sec to 426 iter/sec |
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2016-03-30, 11:57
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#6 |
Aug 2002
2×3×29 Posts |
Intel(R) Xeon(R) CPU E5-2697 v3 @ 2.60GHz
CPU speed: 2594.02 MHz, 14 hyperthreaded cores CPU features: Prefetch, SSE, SSE2, SSE4, AVX, AVX2, FMA L1 cache size: 32 KB L2 cache size: 256 KB, L3 cache size: 35 MB L1 cache line size: 64 bytes L2 cache line size: 64 bytes TLBS: 64 V28.7 Code:
Timings for 4096K FFT length (14 cpus, 1 worker): 1.99 ms. Throughput: 503.07 iter/sec. Timings for 4096K FFT length (14 cpus, 2 workers): 4.82, 4.88 ms. Throughput: 412.40 iter/sec. Timings for 4096K FFT length (14 cpus, 7 workers): 18.85, 18.80, 18.70, 18.70, 18.69, 18.82, 18.82 ms. Throughput: 372.94 iter/sec. Timings for 4096K FFT length (14 cpus, 14 workers): 37.27, 37.12, 37.28, 36.84, 36.66, 37.22, 36.70, 36.84, 36.63, 37.32, 37.47, 53.01, 37.23, 37.44 ms. Throughput: 369.48 iter/sec. Code:
Timings for 4096K FFT length (14 cpus, 1 worker): 1.89 ms. Throughput: 530.30 iter/sec. Timings for 4096K FFT length (14 cpus, 2 workers): 4.72, 4.73 ms. Throughput: 423.22 iter/sec. Timings for 4096K FFT length (14 cpus, 7 workers): 18.98, 18.52, 18.42, 18.36, 18.55, 18.69, 18.53 ms. Throughput: 376.80 iter/sec. Timings for 4096K FFT length (14 cpus, 14 workers): 38.80, 37.37, 37.29, 37.22, 37.06, 37.33, 37.14, 37.02, 37.29, 37.16, 37.82, 38.33, 37.59, 37.65 ms. Throughput: 373.34 iter/sec. |
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2016-03-30, 14:42
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#7 |
"Ram Shanker"
May 2015
Delhi
1001012 Posts |
Feature Request
I sometimes test my office PC using Prime95. Internet connection is blocked in our office, at least for junior employees like me. So the Coms window just goes crazy and posts all the garbage returned by corporate firewall.
So I would like to request that whenever the response is "HTTP 403" i.e. access denied, as is the case with me, it should simply output "Internet Blocked" or something like that. Here is the comms window output. [Main thread Mar 30 16:26] Mersenne number primality test program version 28.7 [Main thread Mar 30 16:26] Optimizing for CPU architecture: Core i3/i5/i7, L2 cache size: 256 KB, L3 cache size: 8 MB [Main thread Mar 30 16:26] Logical CPUs 1,2 form one physical CPU. [Main thread Mar 30 16:26] Logical CPUs 3,4 form one physical CPU. [Main thread Mar 30 16:26] Logical CPUs 5,6 form one physical CPU. [Main thread Mar 30 16:26] Logical CPUs 7,8 form one physical CPU. [Comm thread Mar 30 16:26] Updating computer information on the server [Main thread Mar 30 16:26] Starting worker. [Comm thread Mar 30 16:26] PnErrorResult value missing. Full response was: [Comm thread Mar 30 16:26] <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN"> [Comm thread Mar 30 16:26] <HTML><HEAD><TITLE>Error Message</TITLE> [Comm thread Mar 30 16:26] <META http-equiv=Content-Type content="text/html; charset=UTF-8"> [Comm thread Mar 30 16:26] <STYLE id=L_default_1>A { [Comm thread Mar 30 16:26] FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: #005a80; FONT-FAMILY: tahoma [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] A:hover { [Comm thread Mar 30 16:26] FONT-WEIGHT: bold; FONT-SIZE: 10pt; COLOR: #0d3372; FONT-FAMILY: tahoma [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] TD { [Comm thread Mar 30 16:26] FONT-SIZE: 8pt; FONT-FAMILY: tahoma [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] TD.titleBorder { [Comm thread Mar 30 16:26] BORDER-RIGHT: #955319 1px solid; BORDER-TOP: #955319 1px solid; PADDING-LEFT: 8px; FONT-WEIGHT: bold; FONT-SIZE: 12pt; VERTICAL-ALI [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] TD.titleBorder_x { [Comm thread Mar 30 16:26] BORDER-RIGHT: #955319 0px solid; BORDER-TOP: #955319 1px solid; PADDING-LEFT: 8px; FONT-WEIGHT: bold; FONT-SIZE: 12pt; VERTICAL-ALI [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] .TitleDescription { [Comm thread Mar 30 16:26] FONT-WEIGHT: bold; FONT-SIZE: 12pt; COLOR: black; FONT-FAMILY: tahoma [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] SPAN.explain { [Comm thread Mar 30 16:26] FONT-WEIGHT: normal; FONT-SIZE: 10pt; COLOR: #934225 [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] SPAN.TryThings { [Comm thread Mar 30 16:26] FONT-WEIGHT: normal; FONT-SIZE: 10pt; COLOR: #934225 [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] .TryList { [Comm thread Mar 30 16:26] MARGIN-TOP: 5px; FONT-WEIGHT: normal; FONT-SIZE: 8pt; COLOR: black; FONT-FAMILY: tahoma [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] .X { [Comm thread Mar 30 16:26] BORDER-RIGHT: #955319 1px solid; BORDER-TOP: #955319 1px solid; FONT-WEIGHT: normal; FONT-SIZE: 12pt; BORDER-LEFT: #955319 1px soli [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] .adminList { [Comm thread Mar 30 16:26] MARGIN-TOP: 2px [Comm thread Mar 30 16:26] } [Comm thread Mar 30 16:26] </STYLE> [Comm thread Mar 30 16:26] <META content="MSHTML 6.00.2800.1170" name=GENERATOR></HEAD> [Comm thread Mar 30 16:26] <BODY bgColor=#f3f3ed> [Comm thread Mar 30 16:26] <TABLE cellSpacing=0 cellPadding=0 width="100%"> [Comm thread Mar 30 16:26] <TBODY> [Comm thread Mar 30 16:26] <TR> [Comm thread Mar 30 16:26] <TD class=titleborder_x width=30> [Comm thread Mar 30 16:26] <TABLE height=25 cellSpacing=2 cellPadding=0 width=25 bgColor=black> [Comm thread Mar 30 16:26] <TBODY> [Comm thread Mar 30 16:26] <TR> [Comm thread Mar 30 16:26] <TD class=x vAlign=center align=middle>X</TD> [Comm thread Mar 30 16:26] </TR> [Comm thread Mar 30 16:26] </TBODY> [Comm thread Mar 30 16:26] </TABLE> [Comm thread Mar 30 16:26] </TD> [Comm thread Mar 30 16:26] <TD class=titleBorder id=L_default_2>Network Access Message:<SPAN class=TitleDescription> The page cannot be displayed</SPAN> </ [Comm thread Mar 30 16:26] </TR> [Comm thread Mar 30 16:26] </TBODY> [Comm thread Mar 30 16:26] </TABLE> [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] <TABLE id=spacer> [Comm thread Mar 30 16:26] <TBODY> [Comm thread Mar 30 16:26] <TR> [Comm thread Mar 30 16:26] <TD height=10></TD></TR></TBODY></TABLE> [Comm thread Mar 30 16:26] <TABLE width=400> [Comm thread Mar 30 16:26] <TBODY> [Comm thread Mar 30 16:26] <TR> [Comm thread Mar 30 16:26] <TD noWrap width=25></TD> [Comm thread Mar 30 16:26] <TD width=400><SPAN class=explain><ID id=L_default_3><B>Explanation:</B></ID></SPAN><ID id=L_default_4> There is a problem with [Comm thread Mar 30 16:26] <B><SPAN class=tryThings><ID id=L_default_5><B>Try the following:</B></ID></SPAN></B> [Comm thread Mar 30 16:26] <UL class=TryList> [Comm thread Mar 30 16:26] <LI id=L_default_6><B>Refresh page:</B> Search for the page again by clicking the Refresh button. The timeout may have occur [Comm thread Mar 30 16:26] <LI id=L_default_7><B>Check spelling:</B> Check that you typed the Web page address correctly. The address may have been mistyped. [Comm thread Mar 30 16:26] <LI id=L_default_8><B>Access from a link:</B> If there is a link to the page you are looking for, try accessing the page from that l [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] </UL> [Comm thread Mar 30 16:26] <ID id=L_default_9>If you are still not able to view the requested page, try contacting your administrator or Helpdesk.</ID> <BR><BR [Comm thread Mar 30 16:26] </TD> [Comm thread Mar 30 16:26] </TR> [Comm thread Mar 30 16:26] </TBODY> [Comm thread Mar 30 16:26] </TABLE> [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] <TABLE id=spacer><TBODY><TR><TD height=15></TD></TR></TBODY></TABLE> [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] <TABLE width=400> [Comm thread Mar 30 16:26] <TBODY> [Comm thread Mar 30 16:26] <TR> [Comm thread Mar 30 16:26] <TD noWrap width=25></TD> [Comm thread Mar 30 16:26] <TD width=400 id=L_default_10><B>Technical Information (for support personnel)</B> [Comm thread Mar 30 16:26] <UL class=adminList> [Comm thread Mar 30 16:26] <LI id=L_default_11>Error Code: 403 Forbidden. The ISA Server denied the specified Uniform Resource Locator (URL). (12202) [Comm thread Mar 30 16:26] <LI id=L_default_12>IP Address: 107.155.126.203 [Comm thread Mar 30 16:26] <LI id=L_default_13>Date: 3/30/2016 10:58:38 AM [GMT] [Comm thread Mar 30 16:26] <LI id=L_default_14>Server: XXXXXXXXXXXXXXXXXX [Comm thread Mar 30 16:26] <LI id=L_default_15>Source: proxy [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] </UL> [Comm thread Mar 30 16:26] </TD> [Comm thread Mar 30 16:26] </TR> [Comm thread Mar 30 16:26] </TBODY> [Comm thread Mar 30 16:26] </TABLE> [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] </BODY> [Comm thread Mar 30 16:26] </HTML> [Comm thread Mar 30 16:26] [Comm thread Mar 30 16:26] Visit http://mersenneforum.org for help. [Comm thread Mar 30 16:26] Will try contacting server again in 70 minutes. Last fiddled with by ramshanker on 2016-03-30 at 14:44 |
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2016-03-30, 18:44
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#8 |
"Forget I exist"
Jul 2009
Dumbassville
26×131 Posts |
I decided to bench my system the other day results attached ( i3 2130 cpu so semi outdated because it's no longer made at last check 8 GB RAM):
Last fiddled with by science_man_88 on 2016-03-30 at 18:44 |
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2016-03-30, 19:44
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#9 | ||
"Ron"
Jan 2016
Fitchburg, MA
97 Posts |
For this older laptop, looks like a small decrease in performance.
i3-3120M laptop 4GB ram Ver 28.7 Quote:
Quote:
Last fiddled with by Fred on 2016-03-30 at 19:44 |
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2016-03-30, 19:58
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#10 |
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"Ron"
Jan 2016
Fitchburg, MA
97 Posts |
When upgrading (win64), is it sufficient to just replace the .exe?
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2016-03-30, 21:53
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#11 | |
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∂2ω=0
Sep 2002
República de California
2×7×829 Posts |
Quote:
o AMD's 8-int-core/4-fpu hybrid arch will likely act like an 8-core for integer-dominated work which is not too memory-intensive, for FPU-and-memory-heavy stuff like Prime95 it's effectively a 4-core. o Does "FMA" here mean Intel-AVX2-style FMA3, or the AMD-only FMA4 which AMD introduced in late 2011 with their Bulldozer core? o Has AMD fixed the issue noted by George in which their early AVX offerings performed worse running in AVX mode than they did in SSE2 mode? George, is there any way to force the program to run in SSE2 mode on a platform supporting both? |
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