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#34 |
"Sam Laur"
Dec 2018
Turku, Finland
2·3·5·11 Posts |
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#35 |
"Composite as Heck"
Oct 2017
3×263 Posts |
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As far as I understand it if you're on a single chiplet CPU it may be a downgrade to go beyond 3733 if you're saturating the bandwidth because of the halved IF. If however you're on a two chiplet CPU like the 12 or 16 core it shouldn't be a problem as you have twice as many IF links to keep up with the faster RAM, each chiplet has its own independent IF link. It looks like ideally the 6 core model should be paired with 3733 RAM and the 12 core should be paired with 5000+.
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#36 |
Feb 2016
UK
25×13 Posts |
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The possible problem is in the earlier AMD chart where it shows only so much bandwidth potential between the memory controller to the IF bus. That's the possible choke point for high speed ram, unless you run single channel...
I do have some 4000 B-die ram on hand, and will look to test it out as soon as I can. I'd expect the reviewers will also poke around the new ram potential. Even AMD themselves suggest 3600 ram as the performance/price sweet spot. Last fiddled with by mackerel on 2019-06-24 at 12:01 |
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#37 |
"Sam Laur"
Dec 2018
Turku, Finland
2·3·5·11 Posts |
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Yeah but the halved rate should only apply to the Infinityfabric link between the dies, not that internal link inside the I/O die. But yeah, we'll wait and see for benchmarks.
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#38 |
Feb 2016
UK
25·13 Posts |
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The diagram didn't seem to make any mention of different IF clocks. The only different bit was the part going to IO block (in die) was double the width.
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#39 |
Jun 2019
3×7 Posts |
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Can R9 3950X beat I9-9920X in GIMPS?
Last fiddled with by Bulldozer on 2019-06-29 at 22:43 |
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#40 |
"Composite as Heck"
Oct 2017
3×263 Posts |
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For wavefront LL/PRP testing no. The CPU is not the bottleneck the memory is, the 9920X uses quad channel memory the 3950X uses dual channel. It would take one miracle of a memory overclock (and the doubled L3 cache being more useful than I think it is when memory is the bottleneck) for the 3950X to even get close.
A 16 core zen 2 Threadripper part on the other hand has access to quad channel memory and I'd expect it to comfortably beat a 9920X. |
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#41 |
Feb 2016
UK
6408 Posts |
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What FFT size is leading edge work at? Could the 3950X with 64MB of cache hold that on socket? My concern is the inter-chiplet bandwidth should cores need cache data on other chiplet. This would have to be tested once available.
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#42 | |
Apr 2017
1416 Posts |
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I believe the stickied topics could use some update. |
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#43 |
"Mihai Preda"
Apr 2015
2×677 Posts |
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#44 |
"TF79LL86GIMPS96gpu17"
Mar 2017
US midwest
47·107 Posts |
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Or n of them, for primality testing.
For P-1? Radeon VII or RTX2080 for TF? See also https://www.mersenneforum.org/showpo...8&postcount=20 re cost performance. Last fiddled with by kriesel on 2019-06-30 at 17:09 |
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