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Old 2020-02-20, 03:49   #1
jwaltos
 
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Default RSA -232

https://www.inm.ras.ru/math_center_e...en-factored-5/

I haven't seen this factorization posted on the forum but if it has seen the light of day here previously please delete this post and provide the corresponding coordinates.

Last fiddled with by jwaltos on 2020-02-20 at 03:56
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Old 2020-02-20, 05:45   #2
R.D. Silverman
 
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Quote:
Originally Posted by jwaltos View Post
https://www.inm.ras.ru/math_center_e...en-factored-5/

I haven't seen this factorization posted on the forum but if it has seen the light of day here previously please delete this post and provide the corresponding coordinates.
To quote: " Computational cost of linear system solution step is 50 core-years on Intel Xeon Gold 6136 processor."

This processor has 12 cores. So it took over 4 years to do the LA.......
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Old 2020-02-20, 06:25   #3
axn
 
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Quote:
Originally Posted by R.D. Silverman View Post
To quote: " Computational cost of linear system solution step is 50 core-years on Intel Xeon Gold 6136 processor."

This processor has 12 cores. So it took over 4 years to do the LA.......
6136 supports deployment in 4 socket configuration, so it could be 4x CPUs and 1 year for LA. Guess we have to wait for their paper.
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Old 2020-02-20, 08:03   #4
xilman
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Quote:
Originally Posted by R.D. Silverman View Post
To quote: " Computational cost of linear system solution step is 50 core-years on Intel Xeon Gold 6136 processor."

This processor has 12 cores. So it took over 4 years to do the LA.......
"Parallel block Lanczos-Montgomery". My emphasis.

I was running such LA on a Beowulf cluster of 16 dual-proc PII-300 machines 20 years ago, and its successor 32-cpu 1GHz Athlon a couple of years later. Both used gigabit ethernet switches.

What makes you think that the present effort uses only a single chip?

We are going to have to wait for the full paper to arrive.

Last fiddled with by xilman on 2020-02-20 at 08:04
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Old 2020-02-20, 11:36   #5
fivemack
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So that's a significantly larger and heavier matrix than the RSA-768 factorisation from INRIA; what was the point of doing all that computation to demonstrate they were less effective at factoring a number of the same size than the INRIA group ten years ago?

(I can't immediately find the matrix properties for the RSA-240 factorisation by INRIA two months ago)
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Old 2020-02-20, 13:07   #6
axn
 
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Originally Posted by fivemack View Post
(I can't immediately find the matrix properties for the RSA-240 factorisation by INRIA two months ago)
https://www.schneier.com/blog/archiv...0_factore.html maybe of help
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Old 2020-02-20, 13:16   #7
R.D. Silverman
 
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Quote:
Originally Posted by xilman View Post
"Parallel block Lanczos-Montgomery". My emphasis.

I was running such LA on a Beowulf cluster of 16 dual-proc PII-300 machines 20 years ago, and its successor 32-cpu 1GHz Athlon a couple of years later. Both used gigabit ethernet switches.

What makes you think that the present effort uses only a single chip?

We are going to have to wait for the full paper to arrive.
Read what was written. They said "processor", (singular) not processors. I assume
that a technical paper/announcement is accurate.

Running on multiple cores on a single chip still qualifies as parallel.
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Old 2020-02-20, 13:18   #8
R.D. Silverman
 
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Quote:
Originally Posted by fivemack View Post
So that's a significantly larger and heavier matrix than the RSA-768 factorisation from INRIA; what was the point of doing all that computation to demonstrate they were less effective at factoring a number of the same size than the INRIA group ten years ago?
Bingo! We have a winner.
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Old 2020-02-20, 13:23   #9
R.D. Silverman
 
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Quote:
Originally Posted by axn View Post
6136 supports deployment in 4 socket configuration, so it could be 4x CPUs and 1 year for LA. Guess we have to wait for their paper.
4 CPU's will not run 4x faster than 1. LA speed generally scales with the square root
of the number of CPU's.
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Old 2020-02-20, 13:35   #10
axn
 
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Quote:
Originally Posted by R.D. Silverman View Post
4 CPU's will not run 4x faster than 1. LA speed generally scales with the square root
of the number of CPU's.
But there is no mention of speed (i.e. elapsed time), only the total core-years. You're speculating 12 cores * 4 years, I am speculating 48 cores * 1 year and Paul is speculating larger number of cores. They used their own solver, so we can't even compare with performance numbers from other solvers to reverse engineer the configuration.

As for the singular "processor", they also wrote "polinomial".
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Old 2020-02-20, 14:28   #11
R.D. Silverman
 
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Quote:
Originally Posted by axn View Post
But there is no mention of speed (i.e. elapsed time), only the total core-years. You're speculating 12 cores * 4 years, I am speculating 48 cores * 1 year and Paul is speculating larger number of cores.

I have been told by journal editors: Do not try to "interpret". Accept that what is written
is what is intended. What was written was "processor". Singular. I am not speculating. I am offended by your insinuation that I am speculating.

I accept what was written as factual.

You should learn to do the same when reading a technical article.
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