Intels Intresting Road

[moo]

If you read http://www.tomshardware.com/cpu/20051203/index.html you will notice in the next 2 years intel will begin to roll out some intresting products include 8 core chips late 07 and 6 megs of l2 cache. Good read i would susgest it.

[R.D. Silverman]

Originally Posted by moo

If you read http://www.tomshardware.com/cpu/20051203/index.html you will notice in the next 2 years intel will begin to roll out some intresting products include 8 core chips late 07 and 6 megs of l2 cache. Good read i would susgest it.

Is that 6M *per core*??? If not, the 8 cores will need to share the L2.
I would be very much surprised if 8 processors perform better than 4 in
such circumstances.

I would rather have a single CPU with 48Mbytes of L2 cache...

OTOH, 8 cores each with (say) 64Mbtes of L2 cache would be nice.....

Is main memory multi-ported? What will bus-contention and memory
contention do when 8 processors are running? Will coders be able to
create a shared-memory multi-processor application without having to
grossly distort existing code? What support do current compilers have to
support parallel, shared memory applications? Certainly VC++ has very
little.

Memory latency and bus bandwidth is the current bottleneck; not CPU
clock speed. Cache misses are still deadly. I think Intel would get better
results from designing lower power, slightly slower CPU's with *much* larger
caches. How about increasing the L1 cache?

[moo]

The 6 megs of l2 was for a different model the atrcile talked a little about each of the 20 or so new procs that will be released in the next 2 years. Hopefully.

[Dresdenboy]

Regular readers of theinquirer.net will know most of these cores already and also many details (mostly thanks to Charlie Demerijan, also known from Aces Hardware forum). Here is a nice table:
http://www.tomshardware.com/cpu/2005...overed-04.html

The most interesting CPUs for mersenne hunters would be the line of desktop CPUs. There are still some candidates with high SSE2 throughput (next/final variants of Netburst architecture CPUs) and probably Conroe & its derivatives. Somewhere I read, that they might have a full width SSEn unit (doing it's operation on 128 bit at once, not 2x64 bit as it's now the case). Yonah doesn't have such one, but already shows some nice improvements over Dothan since it has a better handling of SSEn instructions (although it's difficult to differentiate between effects due to the presence of the second core):
http://www.anandtech.com/printarticle.aspx?i=2627

[Peter Nelson]

Originally Posted by Dresdenboy

Regular readers of theinquirer.net will know most of these cores already and also many details (mostly thanks to Charlie Demerijan, also known from Aces Hardware forum). Here is a nice table:
http://www.tomshardware.com/cpu/2005...overed-04.html

The most interesting CPUs for mersenne hunters would be the line of desktop CPUs. There are still some candidates with high SSE2 throughput (next/final variants of Netburst architecture CPUs) and probably Conroe & its derivatives. Somewhere I read, that they might have a full width SSEn unit (doing it's operation on 128 bit at once, not 2x64 bit as it's now the case). Yonah doesn't have such one, but already shows some nice improvements over Dothan since it has a better handling of SSEn instructions (although it's difficult to differentiate between effects due to the presence of the second core):
http://www.anandtech.com/printarticle.aspx?i=2627

Yeah, and people participating in the Intel reseller programme

OR who read anandtech.com regularly also knew most of that info.

But thanks for posting.

I think Mr Silverman is right, I don't see shared cache being particularly great unless it is large capacity to compensate.

I'm still quite excited about what AMD will pull out of the hat. When they move to a faster, cooler process, on the new sockets, using DDR2 for lower power and faster speeds, I think they will be quite competitive. Plus they are going to be adopting faster versions of hypertransport so it can only get better.

I wish Intel would adopt hypertransport too but I don't think it will happen :-(

[Peter Nelson]

Anandtech have got a 9xx processor (Presler) and they report they got it to overclock to 4.8GHz prime stably ON AIR cooling only!!!! Think about those iteration benchmarks.

They will be doing fuller reports on the Presler later.

Sounds like a COOL processor ;-)

Can't wait until January when these should be released.

[georgekh]

YEA i read that anandtech article too and i'm strongly considering dishing out another $3000 for a top of the line computer and i'm going to use my vapochill to cool that presler and maybe i could reach 6GHZ no problem!!! Now think about those iteration benchmarks!!!!!

[Longshot]

I am not convinced that extra L2 cache is that big a deal. I have two computers running 10 million digit LL tests and they are identical except that one is an AMD XP2800+ Thoroughbred (2.25 Ghz. & 256k L2 cache) and the other is a Barton XP3000+ (2.17 Ghz. & 512k L2 cache). Both are 333 FSB. The 2800 iteration is .129 and the Barton is .133 . It seems to me that pure speed (Ghz.) and SSE2 make a bigger difference. Larger L2 cache might become more important as the numbers get larger as I read here not long ago, but for now I don't see it as that important yet. JMHO