Pentium V may have optional 64-bit "module"

GP2 · 2003-09-27, 23:32

Pentium V will launch with 64-bit Windows Elements
http://www.theinquirer.net/?article=11785

Quote:

According to this source, and the details have not been confirmed, a module sitting on top could provide 64-bit extensions.

And the source claimed, Microsoft is ready to launch a version of Windows called Elements with 64-bit extensions.

The idea seems to be that people can buy a 32-bit module, and then add in the 64-bit processor.

SalemTheCat100 · 2003-09-29, 06:26

Quote:

Originally posted by GP2
Pentium V will launch with 64-bit Windows Elements
http://www.theinquirer.net/?article=11785

Here we go AGAIN!

intel may this,

intel may that.

AMD HAS 64 bits NOW, intel doesn't.

SALEM

Xyzzy · 2003-09-29, 08:12

http://arstechnica.infopop.net/OpenT...6&m=7060986785

QuintLeo · 2003-09-29, 15:36

Quote:

Originally posted by SalemTheCat100
AMD HAS 64 bits NOW, intel doesn't.

Not entirely true - remember the Itanic.

9-)

GP2 · 2003-09-29, 16:02

Quote:

Originally posted by SalemTheCat100
AMD HAS 64 bits NOW, intel doesn't.

Salem,
what some of us are speculating is that Intel does have 64-bits now, ready to go, and it's x86-64 bits and never mind the Itanic. Because Intel is neither stupid nor insanely stubborn, and they've been "secretly" working on it all along. They're just carefully preparing the timing of the announcement in a way that's least politically damaging to them, and most likely to steal AMD's thunder. They wait for AMD to fully reveal its hand, and then swoop in.

Remember AMD still has a fair bit of work to do to improve yields and move to 90-nm manufacturing so that they can actually make these things affordably in large numbers. So Intel still has a wide window of opportunity to grab the lion's share of the market share for x86-64 desktop chips.

Dresdenboy · 2003-09-29, 17:11

Unfortunately in the next quarters Intel won't have a AMD64 compatible CPU ready that has enough performance to steal significant amounts of the x86-64 marketshare.

What several rumour sources write is, that Tejas will be the first Intel CPU which will provide AMD64 compatibility.

And test samples of Prescott show a performance increase of roughly 5% against the P4C - as expected (by taking into account the known architectural changes).

But even in 64bit mode a speculative 64bit Prescott - compared to Athlon 64/FX - can't be faster if it's not faster in 32bit mode. To make it easier to understand: if Prescott does 2 adds per cycle in 32bit mode, it can't do 3 64bit adds in 64bit mode. Maybe even only 1 because the operation is a bit more complex (32 bit add is split into 2 16bit adds while a 64 bit add would have to combine the result of 4 16bit adds).

Currently it is hard to get a higher IPC while lengthening the pipeline. With a pipeline length of 25 and an average IPC of 2.0 the CPU would have to throw away 50 instructions after a mispredicted branch. With an 12 stage pipeline and an avg. IPC of 2.8 that would be about 34 instructions.

The whole topic is much more complicated (I study such things since several years for creating a CPU making game

).

Without branches we could just take IPC*clock frequency for a rough performance estimation. But there are a lot of branches. That's a reason for the nice effect of profile guided optimizations.

Regards,
DB

QuintLeo · 2003-10-02, 02:31

The most likely holdback for "Yamhill" is that Intel doesn't want to KILL the Itanic - it's taking forever to get any market momentum going as it is, and if some form of x86-64 gets popular soon enough, the Itanic WILL finally sink - along with the $BILLIONS (several of them) Intel has invested in design, building, and marketing the Itanic.

Even Intel would notice THAT sort of hit on it's bottom line....

Maybeso · 2003-10-02, 20:27

It sounds like we need a grass-roots effort to encourage Intel to hasten the Itanic off to its reward. Perhaps one of the following:

The Itanium Memorial (and R&D Recuperation) Fund
We the undersigned do hereby agree to purchace an Itanium in exchange for a hastening of its demise:
Name Qnty Email
Spaz 1 spaz7@imlost.com
Bob 3 bob99@help.com
...
The Itanium for Tejas Exchange Program
(buy an Itanium now, get a trade-in discount later.)

Post your ideas now. Hey, even if Intel won't go for it, you'll help pass the time while we wait!

2003-10-02, 20:27	#8
Maybeso Aug 2002 Portland, OR USA 2·137 Posts	It sounds like we need a grass-roots effort to encourage Intel to hasten the Itanic off to its reward. Perhaps one of the following: The Itanium Memorial (and R&D Recuperation) Fund We the undersigned do hereby agree to purchace an Itanium in exchange for a hastening of its demise: Name Qnty Email Spaz 1 spaz7@imlost.com Bob 3 bob99@help.com ... The Itanium for Tejas Exchange Program (buy an Itanium now, get a trade-in discount later.) Post your ideas now. Hey, even if Intel won't go for it, you'll help pass the time while we wait!

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2003-09-29, 17:11	#6
Dresdenboy Apr 2003 Berlin, Germany 551₈ Posts	Unfortunately in the next quarters Intel won't have a AMD64 compatible CPU ready that has enough performance to steal significant amounts of the x86-64 marketshare. What several rumour sources write is, that Tejas will be the first Intel CPU which will provide AMD64 compatibility. And test samples of Prescott show a performance increase of roughly 5% against the P4C - as expected (by taking into account the known architectural changes). But even in 64bit mode a speculative 64bit Prescott - compared to Athlon 64/FX - can't be faster if it's not faster in 32bit mode. To make it easier to understand: if Prescott does 2 adds per cycle in 32bit mode, it can't do 3 64bit adds in 64bit mode. Maybe even only 1 because the operation is a bit more complex (32 bit add is split into 2 16bit adds while a 64 bit add would have to combine the result of 4 16bit adds). Currently it is hard to get a higher IPC while lengthening the pipeline. With a pipeline length of 25 and an average IPC of 2.0 the CPU would have to throw away 50 instructions after a mispredicted branch. With an 12 stage pipeline and an avg. IPC of 2.8 that would be about 34 instructions. The whole topic is much more complicated (I study such things since several years for creating a CPU making game ). Without branches we could just take IPC*clock frequency for a rough performance estimation. But there are a lot of branches. That's a reason for the nice effect of profile guided optimizations. Regards, DB

2003-10-02, 02:31	#7
QuintLeo Oct 2002 Lost in the hills of Iowa 2⁶·7 Posts	The most likely holdback for "Yamhill" is that Intel doesn't want to KILL the Itanic - it's taking forever to get any market momentum going as it is, and if some form of x86-64 gets popular soon enough, the Itanic WILL finally sink - along with the $BILLIONS (several of them) Intel has invested in design, building, and marketing the Itanic. Even Intel would notice THAT sort of hit on it's bottom line....