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#1 |
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Apr 2019
5×41 Posts |
I was reading a little bit about new(ish) ARM Scalable Vector Extension and thought it was interesting that the vector length can range from 128 up to 2048 bits, which is up to the chip implementer. Does anyone know if chips exist that use the full 2048bits, or if we are likely to see any in the near future?
How useful would this be for GIMPS style computations? |
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#2 | |
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Undefined
"The unspeakable one"
Jun 2006
My evil lair
6,793 Posts |
Quote:
Also, all that extra computation work done per cycle will raise the temperature, so they might throttle during intensive computations and destroy any benefits. |
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#3 | |
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"Mark"
Apr 2003
Between here and the
1CAD16 Posts |
Quote:
Last fiddled with by rogue on 2019-06-05 at 01:43 |
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#4 |
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∂2ω=0
Sep 2002
República de California
267548 Posts |
I believe the 2048-bit-ness is by way of future-proofing the ISA more than "we expect someone to implement this soon", but I am reasonably hopeful of seeing some kind of broad-scale 256-bit deployment soon. There've been rumors of Apple switching their PCs to ARM, and a 256-bit implementation would make sense there. Also, smartphones keep getting data-hungrier.
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#5 | |
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Jan 2008
France
10010101012 Posts |
Quote:
As far as SVE being able to handle up to 2048-bit, that means that registers can be that large depending on what the CPU designer decides. Once vector length is fixed, this doesn't mean your units will be able to process all the vector at once (think of AMD splitting 256-bit vectors into two pieces of 128-bit). What SVE brings to the table is that the code doesn't have to be different depending on vector length, contrary to x86 where you need different code paths for 128-bit, 256-bit and 512-bit. Note that doesn't mean you'll get the fastest possible code with a single path on ARM, but that's another story. |
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