Some info on version 23 please?

[eepiccolo]

Perhaps George, you'll see this thread here and give us some information on what new things might be coming up in version 23 of Prime95? :)

Thanks very much.

[Prime95]

Originally Posted by eepiccolo

Perhaps George, you'll see this thread here and give us some information on what new things might be coming up in version 23 of Prime95?

I don't have any grand plans right now. Most likely a few speed improvements for P4 CPUs. I have a few tricks I'd like to try out as spare time permits.

The next big change is likely to come with any server improvements. P-1 factoring as a work type, separate userids and teamids, etc.

[pakaran]

Originally Posted by Prime95

The next big change is likely to come with any server improvements. P-1 factoring as a work type, separate userids and teamids, etc.

George,

Do you know what the timeline is likely to be on those server improvements?

We've been talking here for several months now.

Thanks!

[crash893]

was / is there any plan for athlon speed improvments?

[Prime95]

No plans on Athlon speed improvements. I don't have access to an Athlon and even more important the stack based architecture of x87 FPU registers makes it extremely tedious to try new code ideas. The direct addressable SSE2 registers solve this problem.

[pakaran]

Originally Posted by Prime95

No plans on Athlon speed improvements. I don't have access to an Athlon and even more important the stack based architecture of x87 FPU registers makes it extremely tedious to try new code ideas. The direct addressable SSE2 registers solve this problem.

Is that the reason for the P4's massive speed advantage over the XP, even comparing their "real" clock speeds?

[Prime95]

Originally Posted by pakaran

Is that the reason for the P4's massive speed advantage over the XP, even comparing their "real" clock speeds?

An interesting question. I'm not enough of an Athlon expert to make a definitive assessment.

The P4 and Athlon have the same theoretical FPU thoughput - one add and one mul per clock cycle.

However, the P4 has several other advantages:

1) SSE2 gives you 16 floating point values in registers vs. the Athlon's 8
2) SSE2 gives you direct addressing of registers eliminating the need for fxch instructions (which may make register renaming harder for the Athlon?)
3) The P4 has 128-byte cache lines to main memory, meaning better bandwidth
4) The P4 is supposed to have better bandwidth between the L2 and L1 caches.
5) A single SSE2 instruction does twice the work of an x87 FPU instruction. This means that there are half as many instructions to schedule and retire.

The Athlon has some advantages too:

1) The latency for an add or multiply is significantly less than the P4
2) The penalty for a mis-predicted branch is less.

What I can't tell you is which of the above causes prime95 to shine on the P4. Nor can I tell you how much a rewrite of the FFT routines for the Athlon would reduce iteration times.

[pakaran]

What about AMD's "3Dnow Pro" instruction set, for the Athlon XP?

Also, does the AXP having 3 FP pipelines help any?

[Prime95]

Originally Posted by pakaran

What about AMD's "3Dnow Pro" instruction set, for the Athlon XP?
Also, does the AXP having 3 FP pipelines help any?

My understanding is 3Dnow Pro is single-precision floats - useless to prime95.

By three pipelines do you mean add/sub, mul, load/store? If so, the P4 has those too.

[pakaran]

I'm not sure - I just vaguely remember that from an OCing website, so that may indeed be all that's meant.

In many senses the AXP is designed to work well with existing programs - which is why so many gamers are fond of it.

[willmore]

Originally Posted by Prime95

However, the P4 has several other advantages:

1) SSE2 gives you 16 floating point values in registers vs. the Athlon's 8
2) SSE2 gives you direct addressing of registers eliminating the need for fxch instructions (which may make register renaming harder for the Athlon?)
3) The P4 has 128-byte cache lines to main memory, meaning better bandwidth
4) The P4 is supposed to have better bandwidth between the L2 and L1 caches.
5) A single SSE2 instruction does twice the work of an x87 FPU instruction. This means that there are half as many instructions to schedule and retire.

The Athlon has some advantages too:

1) The latency for an add or multiply is significantly less than the P4
2) The penalty for a mis-predicted branch is less.

What I can't tell you is which of the above causes prime95 to shine on the P4. Nor can I tell you how much a rewrite of the FFT routines for the Athlon would reduce iteration times.

P4-pro #2 shouldn't be it as those are supposed to not even get to the execution engine nor, if I remember right, are they even supposed to take an execution slot, but they have to be decoded. They're effectively a NOP that just switches around entries in the aliasing table for the FP rename unit. Of course, this feature helps George write and test more code, so in the big picture, it might be the real winner--from a system perspective. :)

My money is that it's 3 and 4 which do most of the work to make the current P4 implementations rock on this code. Of course, the real winner is simply SSE2 allowing you to do 2 DP FP ops/(cycle|instruction). That beats 1 80 bit OP/(cycle|instruction).

If code can be written to increase the tolerable execution/reuse latency of the P4, then the higher throuput of that chip/implementation will clobber the current athlon family. The athlons have been optimized for low latency--which is very useful for simple and relatively unoptimized code. The large L1/L2 of that chip factors in similarly--it's very forgiving of code that's not blocked well or which has a poor data layout.

So, short answer, P4 is harder to code for and less forgiving, but offers more absolute performance while the Athlon is easier to code for, but doesn't have all of the resources of the P4. So, for 90+% of the code out there, the Athlon will be the winner. But, if you optimize and your alg is capable of it, the P4 can beat it out. mprime fits in the latter category thanks to George (prime95).