Faster Lucas-Lehmer test using integer arithmetic?

[diep]

Originally Posted by __HRB__

Aim for:

~3 instructions/clock for Core2
~2.7 instructions/clock for Athlon II.

How far away are you from the development team?

I thought these chips had a maximum of 2 instructions per cycle at the SIMD unit (times 2 for gflops).

Note on paper in SIMD the Phenom II/barcelona and newer cores such as todays magny core is more capable in SIMD than Nehalem, but i could have misread the marketing propaganda.

On paper for example the multiplication in SIMD of floating point at AMD is 1 cycle in throughput (not to confuse with total latency of the instruction) at barcelona and newer cores; that was one day the announcement of AMD prior to releasing the chip, but i'm not sure whether if you measure that also is the case... ...guessing at intel it is very pricey this instruction.

Vincent

p.s. oh apologies - it is early here - check time of my previous posting at 3 AM - i meant Magny Cours of cours. Magny Core, did i really write that? Jeez. At least the creative thinking of AMD clones in some sense intel there....

[__HRB__]

I think you will find these helpful:

The microarchitecture of Intel, AMD and VIA CPUs: An optimization guide for assembly programmers and compiler makers

Instruction tables: Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs