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Old 2002-09-28, 07:35   #1
penguin22
 
Sep 2002

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Default possibly simple question regarding P4 vs AthlonXP speed diff

OK, for a first post here after reading a ton and being a member (currently 175th) for quite some time... userid is feiraus btw, I have a question.

my question may have been answered before, but why is a P4 that much better at running prime95 than an AthlonXP? Is it basically due to the SSE2 optimizations found in the P4 and lack of optimization for the AXP or due to that and other issues? Or is it just due to the 533 QDR FSB combined with other bus or pipeline factors...

If it is mostly SSE2, my followup question is whether or not the AMD Clawhammer, which should have SSE2 optimizations has been tested with prime95 on one of the demo systems and if so how it fared? I know it's probably too early to ask this but I am a curious bugger.

Thought of a 3rd followup now. Is a 64bit version of Prime95 in the works or even developed that will run on WinXP64bit OS? I am too lazy to open a new window and check for myself on the download page right now.

Thanks for your answers.

Ah well, this led to another question that I'll post in another topic...
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Old 2002-09-28, 13:02   #2
Kevin
 
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My technical knowledge isn't that great, but I think I have the answers you're looking for

1) The main reason P4's are better is SSE2 (may be other small factors, but SSE2 is the big one.)
2) Clawhammer should be about as good as a similarly clocked P4 (very rough estimate). As far as I know, no testing has been done.
3) I don't think Prime95 can take advantage of 64 bit computing, but even if it did we'd need to get George a clawhammer so he could write a new, optimized client. It should be able to run fully optimized as a 32-bit appliction.

Hope this help, and I hope it's all correct. In general, I don't see Clawhammer being widely used for GIMPS.
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Old 2002-09-28, 16:09   #3
ebx
 
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Aug 2002

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No need for the Hammers. The Barton will get AMD back to the game. It has 512K cache, SSE2 and 166MHz FSB. Also 0.13u process. That will put it on an even ground against P4. Note the next XP, due in a couple of days on 10/1, will not be a Barton. They will have 166MHz FSB and that is all.

512K cache may show when we get to 20M or higher. Check the 128K trend of a P4 Celeron.

I personally think the 64 bit Hammer will crash P4 to nowhere if a 64 bit version of Prime95 is in place. General multiple operations should be 4 times as fast if the width doubles. If we do squares most of the time, the speedup would be close to a simple double. Now it is the memory access. I dont know how to estimate it since there is a cache in between. But instruction wise, it loads/stores 64 bits in one shot.

Only if we dont have to wait for the 6 long months.
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Old 2002-09-28, 16:13   #4
ebx
 
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Quote:
Originally Posted by ebx
If we do squares most of the time, the speedup would be close to a simple double.
Should have said 3 times.

(a + b) x (c + d) = ac + ad +bc + bd
(a + b) x (a + b) = aa + 2ab +bb
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Old 2002-09-28, 16:13   #5
adpowers
 
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If I remember correctly, Barton will not have SSE2. That is being saved for the hammer, along with SOI. I hope AMD can release the hammer as soon as possible because, on paper, it is truly amazing. Plus, they are in some financial trouble right now.
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Old 2002-09-28, 16:23   #6
penguin22
 
Sep 2002

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Yeah, I am highly anticipating my Hammer. But right now who isn't in financial trouble? ;)

I guess that we gotta be virtuous. Think about that one.
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Old 2002-09-28, 16:31   #7
ebx
 
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Quote:
Originally Posted by adpowers
If I remember correctly, Barton will not have SSE2.
I am pretty sure Barton has SSE2.

Now Intel is mumbling about SSE3. I didnt check the details but I doubt that will help prime95.
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Old 2002-09-28, 19:10   #8
Prime95
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Quote:
Originally Posted by ebx
I personally think the 64 bit Hammer will crash P4 to nowhere if a 64 bit version of Prime95 is in place. General multiple operations should be 4 times as fast if the width doubles.
That would be true if prime95 used 32-bit integer instructions. Instead prime95 uses the floating point unit heavily. Hammer will have the same size floating point registers as the P4. However, Hammer will have twice as many FPU registers as the P4 (Athlon has half as many as the P4). And AMD has a history of making lower-latency FPU instructions than Intel. It also looks like the Hammer will have enough L2 cache bandwidth to keep the FPU chugging. It looks promising, but we'll just have to wait and see.
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Old 2002-09-28, 20:15   #9
Daffy
 
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Maybe it's a naive question but I wonder if you have ever contacted AMD (or Intel for that matter) to test their chips with Prime95 ?
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Old 2002-09-28, 21:26   #10
ebx
 
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Oh, Intel would love that. There arent many places that they can beat AMD like this. AMD 2000+ is probably the same as P4 1G.

And AMD has to catch up earlier.
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Old 2002-09-28, 21:46   #11
 

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Will any future SSE2 compatible CPU run in my Socket A mobo?
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