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#12 |
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Bemusing Prompter
"Danny"
Dec 2002
California
23·313 Posts |
Well, I'll just wait until 100 Tflop computers cost $1000 each.
Any remember back when the 44 MHz Apple computers cost $9000? |
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#13 |
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Mar 2003
Melbourne
5×103 Posts |
It definately has marketability. Take this article in the local newpaper IT section here is Australia:
AusIT So 147 x 3.06 GHz Dell PowerEdge 1750, which according to www.dell.com.au cost $7,151.10AUS each. So the purchased setup (all 147 servers) cost $1,051,211.7AUS for 1 Tflop. According to the wired article above you'd need 2 fully fitted out machines for $25,000US to get 1.2Tflop. So that's roughly $100,000Aus. I'd hate to think to add the costs of the infrastructure required to support 147servers, compared to 2x desktop machines. With those figures it shows that there is potential in the technology. I think it's using current PCI technology as a proving ground. It'll come more into it's own with the next gen PCI due out next year. PCI Express I think it's called with 2.5Gbit/sec per lane, with up to 32lanes, will be highly suitable for the add on cards. (more info: Endian.net) Time will tell. -- Craig |
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#14 |
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Apr 2003
2·5 Posts |
Or if you bought 147 3.2GHz Dell PowerEdge 400SC servers at $540USD each (a price Dell was selling them for, I bought two, a few weeks ago not including a $100 rebate) then you are down to a more reasonable price and a heck of a lot easier to program.
That parallel chip has an architecture which isn't at all well suited for general purpose programming but if you have a problem that maps to it nicely it will certainly blow the doors off a general purpose CPU. |
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#15 | |
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Sep 2003
2·5·7·37 Posts |
Quote:
The electricity bill makes it pointless to base any price comparison solely on initial cost of purchase of hardware. They are claiming 2W power consumption for their coprocessor chips. Programming would be simplified by the fact that you wouldn't try to wring every last bit of performance out of the coprocessor chips with handcrafted assembly code. That huge effort only makes sense on a platform like x86 with an enormous installed base. Relatively simpleminded LL code would do, at least for a start. |
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#16 |
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Sep 2003
A1E16 Posts |
Does anybody live near Phoenix?
According to Clearspeed's "Events" webpage, they'll be at Supercomputing 2003 from November 15th, 2003 to November 21st, 2003. It would be really great if someone involved with GIMPS made some contacts with these folks and gathered more information. These co-processors are programmable in C, so it would be interesting to get a benchmark for Glucas. Probably Mlucas too (presumably Fortran might be available for this coprocessor, since it's still widely used for scientific computing). It almost doesn't matter what the price is, as long as the bang-per-buck is greater than for a typical farm box. |
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#17 |
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Mar 2003
Melbourne
5×103 Posts |
Did anyone go to the SC2003 forum and catch up with clearspeed?
Anyhow bugger clearspeed, how about this design: http://www.eet.com/semi/news/OEG20031124S0033 64x 64bit fp units @128Gflops, 31W, 'woah'. Maybe call it SSE64? :) Waay better than clearspeed, and more suited to GIMPs. Pity it's not real and only the design stage. -- Craig |
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#18 |
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Sep 2003
1010000111102 Posts |
I got a reply to my inquiry from Jamie Packer at ClearSpeed.
- Currently, the SDK is only available in a bundle with the hardware development board ($25K ), due to current limited availability and limited ability to provide support.- The current processor only supports single-precision floating point -- showstopper for GIMPS -- but a future version will support double precision.- They did express some interest at the "useful publicity" that could be provided by distributed computing projects. Some other distributed computing projects might not need double-precision, so I replied and pointed out Aspenleaf and encouraged them to consider a small but real market for the future where their chip would be a secret weapon in an arms race between teams, and they'd be the arms merchants. |
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#19 | |
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Aug 2002
3×37 Posts |
Hi,
Quote:
I guess a speed of about 0.032 sec/iter in a multithreaded Glucas version (assumnig the same clock). BTW, anybody with access to such machines to try Glucas? On the verifier M40 machine SPE174, a 4-way multithreaded ran at 0.024 sec/iter. The two-way verifier run did it at 0.046 sec/iter. Guillermo |
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#20 | |
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Mar 2003
Braunschweig, Germany
2×113 Posts |
Quote:
Imagine a 4-way opteron beating a 4-way Itanium-II system. Should make AMDs PR-dudes start drooling But i do not have any contacts at AMD
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#21 |
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Apr 2003
2×5 Posts |
I live in Phoenix and stopped by the Clearspeed booth for a chat. As many here have recognized the selling feature of the chip is it's Gflops/W rather than cost or raw performance.
They are looking for people to develop hardware products using their chips rather than selling complete systems. I have no doubt the chip has some specialized applications but processing power is only part of the equation, if you can't move the data on and off the chip fast enough to take advantage of all the on chip parallel processors you aren't going to see a lot of advantages. I've gone thru this exercise with Analog Device SHARK DSP chips in the fast, at their time of introduction they had amazing specs but they were a bear to program compared to a general purpose CPU for large computational tasks. |
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