Stage 1 can be run to gigadigit or higher on 12 GiB ram, probably less ram.

Stage 2 is much more demanding of ram than stage 1.

A rough estimate of stage 2 ram required for successful launch is 30 buffers x (fft length x 8 bytes)/buffer.

For example, if for gigadigit stage 2, 256M is the fastest fft length of sufficient size (>=192Mi), 30 x 256Mi x 8 bytes = 61440 MiB = 60 GiB.

In that case the ram required could be reduced by commenting out the 256M entry in mlucas.cfg, accepting the somewhat slower 192M timing in exchange for smaller ram requirement.

Then 30 x 192Mi x 8 bytes = 45 GiB. Observed ram usage of the Mlucas program in top was 45.9 GiB.

Stage 2 P-1 for F33 is estimated to require 30 x 512Mi x 8 bytes = 120 GiB.

Wavefront stage 2 P-1 at ~107M exponent would require 6M fft length, ~1.4 GiB.

100Mdigit would require 18M fft length, ~4.2 GiB.

~1G exponent would require 56M fft length, ~13.1 GiB. So since free ram in a WSL session is ~12GiB on a 16 GiB system, max exponent for stage 2 on such a system would be ~910M.

Those values above are the estimated minimums to be able to run the stage. Somewhat more ram could enable faster completion.

In preliminary testing, I've observed Mlucas allocate buffers as multiples of 24, plus per Ernst the equivalent of ~5 are required for other data, and buffers are allocated in multiples of 24 or 40. For OBD, 64 GiB would be the same speed as 60 or 80 GiB, but 96 GiB or higher may allow use of 48 buffers or more and somewhat higher speed. There are diminishing returns with successive doublings of ram and buffer count, observed in other P-1 capable software.

Ram in use may fluctuate somewhat. A run of 468M is observed with 6.72 GiB virtual size, 6.02GiB resident in top in stage 2, while the estimate would give for its 26M fft length, 6.1 GiB, for 24 buffers used.

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