AMD Barton core
 

If anyone running Prime95 on a the new barton core?

What, if any, speed improvement does the 512k L2 cache give? :rolleyes:

The 512k L2 dosen't make much of an impact with the Athlon as it did with the Northwood PIV.

[quote="8 ball"]The 512k L2 dosen't make much of an impact with the Athlon as it did with the Northwood PIV.[/quote]

Northwood brought in more than only 512K L2.

On the other hand, will the extra help for bigger fft tables?

The reason why 512k L2 on Barton was not as significant than the P4 was that :-

- AMD's L2 has always been slower. Its only 64bit vs 256bit on intels'. Not only it has less bandwidth it has a higher latency.
- AMD's L1 is much larger than Intel. Meaning additional L2 do not have as much impact.
- As far as I know Intel P4's FPU can only use the L2 and not the L1. Adding more L2 is everything to P4's FPU performance.

[quote="ebx"][quote="8 ball"]The 512k L2 dosen't make much of an impact with the Athlon as it did with the Northwood PIV.[/quote]

Northwood brought in more than only 512K L2.

On the other hand, will the extra help for bigger fft tables?[/quote]

The only real difference is the .13 core and the extra cache, which could be put on because the .13 die was smaller and thus had room for the extra cache. The extra 256k L2 was the major factor in the Pentium 4's road to some performance gain.

[quote="xtreme2k"]- AMD's L2 has always been slower. Its only 64bit vs 256bit on intels'. Not only it has less bandwidth it has a higher latency.[/quote]

I didnt read the manuals so I cant argue on the numbers. But what are 64bit and 256bit refer to? Datapath to memory? They should not make any difference if your data is already in cache. Only filling the cache with data from memory is slower at narrower bus, same clock. That is bandwidth.

64/256 is the datapath between the actual CPU core and the L2 cache.

The AMD has a 64-bit path to L2 whereas the Intel has a 256-bit path...

Some fun articles to read...

http://arstechnica.com/paedia/c/caching/caching-1.html
http://arstechnica.com/paedia/b/bandwidth-latency/bandwidth-latency-1.html

Not to forget Northwood came 'coincidently' with DDR supported chipsets.

Intel L1/L2 operates on different policy from that of AMD by the way.

I guess what I want to see is exact how much improvement the 512K L2 ALONE brings us. No doubt Northwood represents a huge advancing over Williamete(probably 10% performance wise). It was when Intel regained the performance lead over AMD.

DDR support was not a 'coincident' :D

It was a step to move away from RAMBUS. I guess Intel has finally see how unworthy rambus is and is finally ditching them. However from a TECHNICAL point of view RAMBUS is not a bad choice. RAMBUS in itself is far superior than the fastest DDR/SDR memory at the time. Just that from a PRICING (and some political) point of view it is a very very poor.

I would love to see what the extra L2 on the Barton brings us. But I must have missed some good reviews on them. Most of them show them operating on DIFFERENT CLOCk and DIFFERENT FSB. Which is impossible for comparison.

[quote="xtreme2k"]64/256 is the datapath between the actual CPU core and the L2 cache.[/quote]

If a 64 bit bus is enough to feed a CPU at say 2.5GHz, 256bit wont help a whole lot. Remember they both run at cpu clock. I actually noted down the numbers of L1/L2 bandwidth for an xp1900 and a p4 2.2 the other day when I ran memtest. I seem to recall intel is over twice as fast in L2. I will dig the numbers out tonight.

Going DDR was the trend. We dont like the price of RDRAM. We also like to have choices. However, Intel may have planned its ddr support timeing wise so it appeared as a coincidence. Intel was at a point very firm on RDRAM. It sued VIA who offered a DDR chipset for P4. It was just the users, or money of users rather, that pushed them over. ' I cant/dont want to afford rdram and sdram is crawling, so I go AMD who runs on ddr.' Ouch, that hurts!