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K1OM MIC 5110P RSA-140 Results
2 Attachment(s)
Hello,
Here is a summary of some preliminary test results using cado-nfs and a many integrated core accelerated system [1920 cores = 60 clients * 4 threads * 8 5110P]. RSA-140 Trial #1: 18.18 hrs 201601061955 - 201601062001 6 minutes for Client Launcher 201601062001 - 201601062101 60 minutes for polyselect1 [MIC] 201601062101 - 201601062154 53 minutes for polyselect2 [MIC] 201601062154 - 201601062154 1 minutes for makefb [INTEL64] 201601062154 - 201601062155 1 minutes for freerel [INTEL64] 201601062155 - 201601070506 431 minutes for las [MIC] 201601070506 - 201601070533 27 minutes for filter [INTEL64] 201601070533 - 201601071350 497 minutes for linalg [INTEL64] *** 201601071350 - 201601071405 15 minutes for sqrt [INTEL64] 201601061955 - 201601071405 1091 minutes for entire operation Most time was spent on the linear algebra, probably because its still on the host, not MIC. Attached is the compressed log file for RSA-140, and some logs for RSA-120. Pointers would be greatly appreciated! Thanks |
[QUOTE=mancoast3;421504][1920 cores = 60 clients * 4 threads * 8 5110P].
[/QUOTE] whoops I meant 1920 threads, not cores |
Using msieve, one can pass a flag "target_density=xxx" during the filtering step, to make filtering work harder to create a smaller matrix at the cost of requiring more relations. The msieve default is 70; target density 100 cuts my matrix-solve time in half, roughly.
If there is a similar control for cado, you should be able to spend 10-15% more time in sieve to save 40-60% of linalg. The CADO parameter file has an awful lot of settings; I haven't looked for this specifically, so I don't know if it's there. |
This will probably get more exposure in the "factoring" subforum instead of the hardware subforum.
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kinda of forgot to explain why I posted these logs.
cado-nfs was chosen over msieve because I am too lazy to dive into assembly, at the moment. The goal was to perform gap analysis for MIC acceleration of a large integer algorithm. I'd be honored to switch gears to the Mersenne code-base. So I am an electrical, and I enjoy hardware more than math, but math is cool. ASM microinstruction are awesome because in the control unit encoder one can imagine the electricity from your PSU being transferred into a magical black-box that enables the registers, program counter, etc... The translations of multiple electrical pathways into usable ASM instructions fascinates me. |
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