P4 Prescott - 31 Stage Pipeline ? Bad news for Prime95?
 

I have been reading the new Prescott reviews with a bit of shock. I expected the prescott doubles both the L1 and L2 cache. The biggest surprise to me is that the integer pipeline increased from 21 stages to 31 stages. This compares to the 10/15 stage (integer/FP) pipeline of the Athlon XP. I am not an assembly programmer but this sounds like it could be trouble for Prime95's highly optimized asm code. Given the market dominance of Intel it may be more critical to fix this problem (if it exists) than to fix the Operteron.

I recall George saying that SSE3 (PNI - Prescott New Instructions) did not look intresting. However, in anandtech's review he says that ADDSUBPS, ADDSUBPD, MOVSLDUP, MOVSHDUP and MOVDDUP are helpful in FFT.
[url]http://www.anandtech.com/cpu/showdoc.html?i=1956&p=9[/url]

Does anyone have a Prescott CPU they can test using the existing code?

Assuming their is a Prescott preforms seriously slower with the current Prime95 code, does anyone support the creation of a fund to purchase a Prescott CPU for the development team? I pledge my support.

[url]http://www.aceshardware.com/read.jsp?id=60000315[/url]

Intel Prescott: We expected a Lexus and got a Hyundai:
[url]http://www.theinquirer.net/?article=13947[/url]

What's wrong with the Intel Prescott?
[url]http://www.theinquirer.net/?article=13927[/url]

My friend says he will be getting a Prescott for free. He doesn't know how long it will take, but he estimated a month. We'll see if really gets it :).

He is starting to become a stats whore like myself, so I'll ask if he'll want to help beta test the Prescott improvements.

Andrew

It looks like intel has hinted the pending death of socket 478. It looks like intel is spending a fortune making 3.2 and 3.4ghz northwood processors. I feel that socket 478 will become a bargain system, so intel wishes to replace northwood with the less expensive prescott @ .09u.

Tejas will come to replace the northwood, canterwood, and prescott in about 7 months, so i feel that a expensive optimization project will be wasted.

The increased cache latency time also looks like it will cause a considerable slowdown.

The anandtech article is interesting because it suggests that with increasing clockspeed Prescott starts to outperform a similarily clocked Northwood. Very similar to what happened when P4's were initially introduced, when compared to a P3

So at the currently available clock speeds, staying with Northwood seems to be the way to go. Now by the end of the year when the Prescott reaches 4 GHz, that might all change.

Long pipelines are typically a problem with branch intensive code. I don't think a FFT qualifies, so it shouldn't hurt Prime95 that much.

On the other hand, the increased cache latency might hurt Prime95.

[QUOTE=E_tron]It looks like intel has hinted the pending death of socket 478. It looks like intel is spending a fortune making 3.2 and 3.4ghz northwood processors. I feel that socket 478 will become a bargain system, so intel wishes to replace northwood with the less expensive prescott @ .09u.

Tejas will come to replace the northwood, canterwood, and prescott in about 7 months, so i feel that a expensive optimization project will be wasted.[/QUOTE]

Why is intel speding a fortune making 2.3/3.4 GHz Northwood processors? What are the Tejas changes beyond the socket 478 -> socket T?

It is more expensive to make Northwood's simply because the chips are bigger, so you don't get as many chips per wafer. I can't remember the figures but I think it was something like 30% more Prescott's per wafer.

It makes sense for Intel to keep making Northwoord's at the moment until they can ramp up the production and yields of the Prescott chips. But it is pretty obvious that Intel want to stop producing Northwood's otherwise they would have priced Prescott's at a premium.

The other benefit of Prescott chips is that since they have a longer pipe, the clock speed can be increase pretty quickly. Which is when they'll start out-performing Northwoods.

Isn't Tejas, rumoured to have x86-64 (ala Athlon64) or something?

[QUOTE=gowen72]The increased cache latency time also looks like it will cause a considerable slowdown.

The anandtech article is interesting because it suggests that with increasing clockspeed Prescott starts to outperform a similarily clocked Northwood. Very similar to what happened when P4's were initially introduced, when compared to a P3
[/QUOTE]

The P4 on *most* work has NEVER matched a P3 per clock - even the upgraded cache in the Northwood P4s didn't help enough to overcome that entirely. I doubt that the huge cache on the "P4 EE" managed it either.

The *only* reason the P4 eventually passed the P3 on performance is that the P3 topped out at 1.4 Ghz - and it took Intel a lotta work to get it that far.

I seriously doubt that the Prescott will ever match the Northwood on per-Mhz efficiency - it appears that Intel is going the "more pipeline stages to increase the CPU Mhz faster" route yet again, since that lets them keep their "Mhz matters" BS ad campaign going.

well i just recived a prescott the day and i already notice the improves ments on the cache. I have 1 machine that has a northwood 3.2ghz and my new prescott is a 3.0ghz both machines are the same spec apart from the processor obviously and i see my prescott out running the northwood easily

Michael S, who helped together with magicfan to measure the Banias FPU throughput/latency values, now published results for Nocona/Prescott:
[url]http://realworldtech.com/forums/index.cfm?action=detail&PostNum=1743&Thread=31&entryID=37801&roomID=11[/url]

The long pipeline causes really high latencies for SSE2 instructions (compared to Northwood).