configuration for max memory bandwidth
 

I am looking for ways to get maximum DRAM bandwidth/traffic. I tried to customize the torture test to run a larger FFT (8192-16384) and bumped up the 'memory to use' to about 80% of my RAM size but not had much success.

Any suggestions how I could increase the bandwidth ?

Use quad channel DDR4.

I'm not meaning to be flippant, because it is true. I also know you were asking about tweaking what you have, not doing a total system change (unless you already have a beast that has such capability.)

And it appears there's no gain in bandwith with DDR3 over 2400 MHz in Haswell. Bandwidth actually drops: [url]http://www.corsair.com/en/blog/2014/september/ddr3_vs_ddr4_synthetic[/url]

I wasn't expecting that.

[QUOTE=smartypants;403508]I am looking for ways to get maximum DRAM bandwidth/traffic. I tried to customize the torture test to run a larger FFT (8192-16384) and bumped up the 'memory to use' to about 80% of my RAM size but not had much success.

Any suggestions how I could increase the bandwidth ?[/QUOTE]

You appear confused. Asking about "maximum bandwidth" is a hardware question, yet you mention attempts at software solutions. I think you're misusing the word "bandwidth", which is the rate data is exchanged with memory. Bandwidth does not describe how much memory is used.

Please rephrase your question without using the word "bandwidth".

[QUOTE=VBCurtis;403517]You appear confused. Asking about "maximum bandwidth" is a hardware question, yet you mention attempts at software solutions. I think you're misusing the word "bandwidth", which is the rate data is exchanged with memory. Bandwidth does not describe how much memory is used.

Please rephrase your question without using the word "bandwidth".[/QUOTE]

I am looking for a way to generate maximum possible traffic to DRAM.

Using smaller FFT's would mean the data fits in the cache and a low DRAM access. I am looking for the opposite scenario - high DRAM access. I tried to increase the FFT size to miss in the cache and hit DRAM, which did help. I would like to find out if there is a "sweet spot" which would give me the highest DRAM read/write access.

[QUOTE=smartypants;403518]I am looking for a way to generate maximum possible traffic to DRAM.[/QUOTE]

Write, compile, and then run, a C program which randomly accesses all available memory.

Oh... Imagine that. This has [URL="http://www.memtest86.com/"]MemTest[/URL] already been done.

The large FFT torture test (choose custom and then in-place) will max out your memory bandwidth if you run it on all cores.

There are benchmark programs that measure memory bandwidth (i think one is called AIDA64 is one). These max out memory bandwidth but do not check results along the way.

Memtest will also max out mem bandwidth if you run multiple threads. No single-threaded program can max out memory bandwidth. Last I looked memtest on multiple threads was broken.

[QUOTE=Mark Rose;403515]And it appears there's no gain in bandwith with DDR3 over 2400 MHz in Haswell. Bandwidth actually drops: [URL]http://www.corsair.com/en/blog/2014/september/ddr3_vs_ddr4_synthetic[/URL]

I wasn't expecting that.[/QUOTE]

Are the timings being loosened up to go higher in frequency?

[QUOTE=smartypants;403518]I am looking for a way to generate maximum possible traffic to DRAM.

Using smaller FFT's would mean the data fits in the cache and a low DRAM access. I am looking for the opposite scenario - high DRAM access. I tried to increase the FFT size to miss in the cache and hit DRAM, which did help. I would like to find out if there is a "sweet spot" which would give me the highest DRAM read/write access.[/QUOTE]

I believe you are a bit confused about how the program works.

The higher the FFT, the more data needs to travel in and out of RAM. Lower FFT's don't reduce memory traffic; [I]they [B][U]require[/U][/B] less[/I]. In this sense, small FFT's are "better" because they use up less of your bandwidth. Higher FFT's need more and if your system doesn't have enough, then the CPU has to constantly wait for your memory to spit out the data so you're losing efficiency there. We say that the system is "bottlenecked" by memory.

Imagine if the CPU is a big factory with a bunch of trucks coming in delivering materials and leaving carrying toys. By increasing the power of your factory, you make more toys which means you have to have more trucks coming in. Eventually though, the road isn't big enough for all the trucks and your factory is constantly waiting for trucks to bring more stuff.

What you're asking us is how to maximize the amount of trucks on your road. This isn't necessarily "better".

If you want to stress test your memory and memory controller then run the stress test George suggested.

[QUOTE=kladner;403528]Are the timings being loosened up to go higher in frequency?[/QUOTE]

According to the link, they increased for 2800 MHz by 1, but not for 2666 MHz.

[QUOTE=Mark Rose;403533]According to the link, they increased for 2800 MHz by 1, but not for 2666 MHz.[/QUOTE]

Oops. I skipped over the link. There are some interesting things there. It looks like that up to a point Ivy-E almost holds its own, but the higher clocks of DDR4 leave it in the dust (if you can afford 3 G or 3.2 GHz parts)