I hypothesize that GCC support for KNL will evolve to fruition before GCC supports KNC!

While attending colfax training, the instructors advised against performing intrinsic optimization using k1om 512 SIMD = IMCI [Initial Many Core Instruction] != AVX-512.

Instead, the concept of future proof coding was demonstrated with vTune amplifier, and #defines with special Intel specific meanings. I did not fully grasp the concepts, and have not yet read the technical notes.

In my opinion, seems like there are fewer gaps resulting in few requirements for KNL support. Also, seems like KNC GCC support is far from completed.

[QUOTE=ewmayer;421600](Also in the latter regard, does anyone know if the GCC-dev team has KL on its supported-hardware roadmap?)[/QUOTE]

AVX-512 support was added in 4.9, released in April 2014. You may find [url=https://gcc.gnu.org/wiki/cauldron2014?action=AttachFile&do=get&target=Cauldron14_AVX-512_Vector_ISA_Kirill_Yukhin_20140711.pdf]this PDF[/url] from July of the same year interesting.

[QUOTE=mancoast3;421652]...
While attending colfax training, the instructors advised against performing intrinsic optimization using k1om 512 SIMD = IMCI [Initial Many Core Instruction] != AVX-512.
...[/QUOTE]

My take-away from reading the available info was the same, that the Knights Corner 512-bit support was incompatible with AVX-512 (instruction wise).

That's a shame, but what can you do. Functionally they seemed pretty similar, just not code compatible.

Once Skylake Xeons with AVX-512 (and eventually KNL) are out there in the world, I expect that to be the future path of things, relegating the KNC stuff into the category of abandoned Intel branches, ala Itanium. Just my guess...

[QUOTE=Madpoo;421664]KNC stuff into the category of abandoned Intel branches, ala Itanium.[/QUOTE]

Agreed, checkout this pdf from cornell ECE:
[url]http://www.cac.cornell.edu/education/training/StampedeOct2013/Vectorization.pdf[/url]

When the KNL is launched, what happens to the price of the 5110P?

Then i see this in the news:
[url]https://thunderbolttechnology.net/sites/default/files/IDFSF15_HSTS004_100a_1.pdf[/url]

Will we be able to plug the 5110P into the thunderbolt port?
That is exactly what I want!

[QUOTE=mancoast3;421668]Agreed, checkout this pdf from cornell ECE:
[url]http://www.cac.cornell.edu/education/training/StampedeOct2013/Vectorization.pdf[/url]

When the KNL is launched, what happens to the price of the 5110P?

Then i see this in the news:
[url]https://thunderbolttechnology.net/sites/default/files/IDFSF15_HSTS004_100a_1.pdf[/url]

Will we be able to plug the 5110P into the thunderbolt port?
That is exactly what I want![/QUOTE]

That would be spiffy.

Intel did recently (well, sometime last year) start offering the Xeon Phi development kits with the (I think) 3120A version for a really good price.

I don't know if the 3120A had the same motherboard requirements as the 5110P where some setting had to be configured in the BIOS (I forget what it was). I only had a few newer servers that could have supported that. If the 3120A didn't need that, it should be more popular if the price were decent. Pop into a PCI slot and go.

Even better if there were a Thunderbolt option... imagine how cool that would be. Racks of those things mostly untethered from the host system, doing their thing.

[QUOTE=Madpoo;421687]I don't know if the 3120A had the same motherboard requirements as the 5110P where some setting had to be configured in the BIOS (I forget what it was).[/QUOTE]

Somethink like "[B]above 4GB decoding[/B]" I guess. And is is requiered for all Xeon Phis I had my hands on, no matter if 31x0, 51x0 or 71x0 or some of the non-standard numbering schema SKUs. The chip is the same for all cards with the "1" in second place.

Oliver

[QUOTE=TheJudger;421708]Somethink like "[B]above 4GB decoding[/B]" I guess. And is is requiered for all Xeon Phis I had my hands on, no matter if 31x0, 51x0 or 71x0 or some of the non-standard numbering schema SKUs. The chip is the same for all cards with the "1" in second place.

Oliver[/QUOTE]

Here's the scoop. In the HP Proliant world I think anything in the DL series that's gen8 or gen9 are fine, but gen 7 and earlier don't support it.

[URL="https://www.pugetsystems.com/labs/articles/Will-your-motherboard-work-with-Intel-Xeon-Phi-490/"]https://www.pugetsystems.com/labs/articles/Will-your-motherboard-work-with-Intel-Xeon-Phi-490/[/URL]

I use the 31S1P on ASUS Z97 for debug/compile. Requires cooling mod.
People on the MIC forums reported success also using the X99.
Both support memory mapped above the 4GB address space.

Z97 price has dropped significantly, and the 31S1P was built in excess.
I have confirmed Z97 works with the Intel Quality spec'd 31S1P.

[QUOTE=mancoast;422156]I use the 31S1P on ASUS Z97 for debug/compile. Requires cooling mod.
People on the MIC forums reported success also using the X99.
Both support memory mapped above the 4GB address space.

Z97 price has dropped significantly, and the 31S1P was built in excess.
I have confirmed Z97 works with the Intel Quality spec'd 31S1P.[/QUOTE]

Can you please clarify which model you are using. Because ASUS has several models based on Z97 chipset.

Thank you in advance.

SABERTOOTH Z97 MARK 1

System requires works out of box with MPSS3.5 on Windows.
System requires kernel parameters to work with MPSS Linux stack.

I don't know if this was known, but it looks like Xeon Phi Next Gen will land in Q3'16: [URL]http://www.computerbase.de/bildstrecke/71377/2/[/URL]

This page is also useful: [URL]https://software.intel.com/en-us/articles/what-disclosures-has-intel-made-about-knights-landing[/URL]

Ernst, did you get anything back from Intel regarding early access to KL?