AVX?
 

[QUOTE=R.D. Silverman;237345]Based upon what I have read Sandy Bridge will not be any faster/more
powerful than the current i7's.[/QUOTE]
There's AVX. I don't know exactly how Prime95 is affected (speed doubled?).

[QUOTE=Brain;236316]I'm scared. Is this commonly agreed? Solution? (Run always a DC on one core..?)

By the way, I suggest a PrimeScore feature in Prime95. This would be a positive integer describing a (CPU) performance index that is easily comparable and generated after benchmarking. This could also make Prime95 a test reference in hardware online magazines.

Formula (naive) suggestion, given no helper threads: PrimeScore = Theoretical CPU throughput = Sum(FFT size*(1/Iteration time))*Number of possible workers[/QUOTE]

Silent Errors are almost not possible if you enable all error corrections (needs around 4 - 6 per cent more time). Check your overclocked hardware with a torture test over 1- 3 days.

[QUOTE=R.D. Silverman;237345]Rather than concentrate on new architectures, smaller dies, etc., I think it would be marvelous if they just gave us a new chip with the same architecture as the current i7, but with 1 Gbyte of L2 cache per core. :smile:

We'd really see some performance improvements![/QUOTE]As I said to Ernst recently in another thread in another context: "Who is this we white-man?". In other words, to whom would they sell this device in quantities sufficient to make it affordable?

A few weirdos, many of the inhabitants of this forum for example, would really love such a chip. Almost the entire population would have little or no use for it.

Over 10 years ago I contributed to an IEEE workshop devoted to trends in high-performance computing in its various guises. Present were Intel and AMD hardware guys. I, and several others, said that what they would really like is a significant amount of memory as fast as the cpu could use it. Registers, in other words, or[B] L1 [/B]cache at a pinch. "Significant" meant somewhere between 100Mbyte and 1Tbyte (may as well be optimistic!).

Still waiting.

Paul

[QUOTE=R.D. Silverman;237345]Rather than concentrate on new architectures, smaller dies, etc., I think it would be marvelous if they just gave us a new chip with the same architecture as the current i7, but with 1 Gbyte of L2 cache per core. :smile: Give us cache, lots of cache in the sunny skies above....[/QUOTE]
Don't forget the golden rule: The bigger the memory, the slower the speed/access rate. :sad:

[QUOTE=R.D. Silverman;237345]Based upon what I have read Sandy Bridge will not be any faster/more
powerful than the current i7's.

I have a thought.......:smile:

Rather than concentrate on new architectures, smaller dies, etc., I think
it would be marvelous if they just gave us a new chip with the same
architecture as the current i7, but with 1 Gbyte of L2 cache per core. :smile:[/QUOTE]

Aside from some minor matters of architecture and of distribution, this has been done: the higher-end GPUs have aggregate bandwidth (192GB/sec on geforce 580) to the 2GB main memory rather better than the aggregate L2 bandwidth (25.7GB/sec/core) of a Core i7 :smile:

[QUOTE=fivemack;237403]Aside from some minor matters of architecture and of distribution, this has been done: the higher-end GPUs have aggregate bandwidth (192GB/sec on geforce 580) to the 2GB main memory rather better than the aggregate L2 bandwidth (25.7GB/sec/core) of a Core i7 :smile:[/QUOTE]Latency?

Paul

Cisco sell blades with dual xeon processors and 384GB of ram.

RAM on video cards has always been faster than main system ram sold at the time. (To my knowledge)

The reason given was that it was cost reasons. But video cards as cheap as they are now - this reason doesn't seem to hold water these days.

-- Craig

[QUOTE=R.D. Silverman;237345]Based upon what I have read Sandy Bridge will not be any faster/more powerful than the current i7's.[/QUOTE]

What about AVX double-width SSE registers?

Doesn't that have the capability of improving 2x DP FP over current gen? Granted that it requires code development.

-- Craig

50 MB Cache
 

[QUOTE=R.D. Silverman;237345]Rather than concentrate on new architectures, smaller dies, etc., I think
it would be marvelous if they just gave us a new chip with the same
architecture as the current i7, but with 1 Gbyte of L2 cache per core. :smile:

We'd really see some performance improvements!

Give us cache, lots of cache in the sunny skies above....[/QUOTE]

Intel has announced Codename „Poulson“:

An Itanium® processor implemented in 32nm CMOS with 9 layers of Cu contains 3.1 billion transistors. The die measures 18.2×29.9mm². The processor has 8 multi-threaded cores, a ring-based system interface and combined cache on the die is [B]50MB[/B]. High speed links allow for peak processor-to- processor bandwidth of up to 128GB/s and memory bandwidth of up to 45GB/s.

The pricing for Sandy Bridge has vaguely emerged, and it doesn't seem that the higher-end model is going at a painful premium: the i7/2600 (four cores, 3.4GHz, hyperthreading, 8 DP flops per cycle peak using AVX, though only dual-channel DDR3/1600 RAM) is $350 which is about what I paid for my i7/920 shortly after release.

[QUOTE=R.D. Silverman;237345]Rather than concentrate on new architectures, smaller dies, etc., I think it would be marvelous if they just gave us a new chip with the same architecture as the current i7, but with 1 Gbyte of L2 cache per core. :smile:

We'd really see some performance improvements!

Give us cache, lots of cache in the sunny skies above....[/QUOTE]
Just an opinion, but that sort of thing would require some rather exotic cooling. It might even be too hot for helium cooling.


Anyone know how to calculate this sort of thing?