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-   -   possibly simple question regarding P4 vs AthlonXP speed diff (https://www.mersenneforum.org/showthread.php?t=132)

penguin22 2002-09-28 07:35

possibly simple question regarding P4 vs AthlonXP speed diff
 
OK, for a first post here after reading a ton and being a member (currently 175th) for quite some time... userid is feiraus btw, I have a question.

my question may have been answered before, but why is a P4 that much better at running prime95 than an AthlonXP? Is it basically due to the SSE2 optimizations found in the P4 and lack of optimization for the AXP or due to that and other issues? Or is it just due to the 533 QDR FSB combined with other bus or pipeline factors...

If it is mostly SSE2, my followup question is whether or not the AMD Clawhammer, which should have SSE2 optimizations has been tested with prime95 on one of the demo systems and if so how it fared? I know it's probably too early to ask this but I am a curious bugger.

Thought of a 3rd followup now. Is a 64bit version of Prime95 in the works or even developed that will run on WinXP64bit OS? I am too lazy to open a new window and check for myself on the download page right now.

Thanks for your answers.

Ah well, this led to another question that I'll post in another topic...

Kevin 2002-09-28 13:02

My technical knowledge isn't that great, but I think I have the answers you're looking for

1) The main reason P4's are better is SSE2 (may be other small factors, but SSE2 is the big one.)
2) Clawhammer should be about as good as a similarly clocked P4 (very rough estimate). As far as I know, no testing has been done.
3) I don't think Prime95 can take advantage of 64 bit computing, but even if it did we'd need to get George a clawhammer so he could write a new, optimized client. It should be able to run fully optimized as a 32-bit appliction.

Hope this help, and I hope it's all correct. In general, I don't see Clawhammer being widely used for GIMPS.

ebx 2002-09-28 16:09

No need for the Hammers. The Barton will get AMD back to the game. It has 512K cache, SSE2 and 166MHz FSB. Also 0.13u process. That will put it on an even ground against P4. Note the next XP, due in a couple of days on 10/1, will not be a Barton. They will have 166MHz FSB and that is all.

512K cache may show when we get to 20M or higher. Check the 128K trend of a P4 Celeron.

I personally think the 64 bit Hammer will crash P4 to nowhere if a 64 bit version of Prime95 is in place. General multiple operations should be 4 times as fast if the width doubles. If we do squares most of the time, the speedup would be close to a simple double. Now it is the memory access. I dont know how to estimate it since there is a cache in between. But instruction wise, it loads/stores 64 bits in one shot.

Only if we dont have to wait for the 6 long months.

ebx 2002-09-28 16:13

[quote="ebx"]If we do squares most of the time, the speedup would be close to a simple double. [/quote]

Should have said 3 times.

(a + b) x (c + d) = ac + ad +bc + bd
(a + b) x (a + b) = aa + 2ab +bb

adpowers 2002-09-28 16:13

If I remember correctly, Barton will not have SSE2. That is being saved for the hammer, along with SOI. I hope AMD can release the hammer as soon as possible because, on paper, it is truly amazing. Plus, they are in some financial trouble right now.

penguin22 2002-09-28 16:23

Yeah, I am highly anticipating my Hammer. But right now who isn't in financial trouble? ;)

I guess that we gotta be virtuous. Think about that one.

ebx 2002-09-28 16:31

[quote="adpowers"]If I remember correctly, Barton will not have SSE2. [/quote]

I am pretty sure Barton has SSE2.

Now Intel is mumbling about SSE3. I didnt check the details but I doubt that will help prime95.

Prime95 2002-09-28 19:10

[quote="ebx"]I personally think the 64 bit Hammer will crash P4 to nowhere if a 64 bit version of Prime95 is in place. General multiple operations should be 4 times as fast if the width doubles.[/quote]

That would be true if prime95 used 32-bit integer instructions. Instead prime95 uses the floating point unit heavily. Hammer will have the same size floating point registers as the P4. However, Hammer will have twice as many FPU registers as the P4 (Athlon has half as many as the P4). And AMD has a history of making lower-latency FPU instructions than Intel. It also looks like the Hammer will have enough L2 cache bandwidth to keep the FPU chugging. It looks promising, but we'll just have to wait and see.

Daffy 2002-09-28 20:15

Maybe it's a naive question but I wonder if you have ever contacted AMD (or Intel for that matter) to test their chips with Prime95 ?

ebx 2002-09-28 21:26

Oh, Intel would love that. There arent many places that they can beat AMD like this. AMD 2000+ is probably the same as P4 1G.

And AMD has to catch up earlier.

2002-09-28 21:46

Will any future SSE2 compatible CPU run in my Socket A mobo?

Daffy 2002-09-28 22:13

[quote="ebx"]Oh, Intel would love that. There arent many places that they can beat AMD like this. AMD 2000+ is probably the same as P4 1G.

And AMD has to catch up earlier.[/quote]

Actually, I was more thinking about AMD and their new processor supporting SS2. That could be a good way for them to show they are catching up and maybe beating Intel. And if it could come with free machines for Gimps...

;)

ebx 2002-09-28 23:03

[quote="FlatLander"]Will any future SSE2 compatible CPU run in my Socket A mobo?[/quote]

Barton is an Athlon XP. It is only a new core. If your motherboard supports higher GHz(read higher multipler) and 166MHz FSB like most newer mobos, a BIOS update is likely what you need to run Barton. I am counting on it.

Hammer is a completely different animal. It has a lot more pins than Socket A.

xtreme2k 2002-09-29 02:18

I believe Barton does not have SSE2. Only Hammers have SSE2. Barton is not a hammer, its an AthlonXP with 512KB L2 (maybe SOI) and 333Mhz FSB. I have NEVER heard Barton will have SSE2. Please show links of the info.

Xyzzy 2002-09-29 04:19

So there won't be a new chipset for Barton? When are they supposed to be released?

penguin22 2002-09-29 06:17

Well the KT400 is out and in fact, VIA is releasing it as the KT333 being that they have chipset shortages for the KT333... I try to keep up with the tech sites somewhat. Believe Icrontic mentioned it. But the KT333 should support it with BIOS updates.

ebx 2002-09-29 08:10

[quote="xtreme2k"]Please show links of the info.[/quote]

I cant find any official url that says that Barton does or does not have the SSE2, specially not from AMD's site. (AMD is tight lips on Barton but has a lot info on Hammer.) I know I have read about it but I cant show you. I will post it here if I find any semi-official links again.

There is not tech difficult of putting SSE2 to XP. It wont make any big impact on acceptance of the cpu since very few applications care about it. Since Intel has it for a while, it will only make sense for AMD to have it when they have a chance to redesign the core.

Barton is a new core for XP not a new cpu, just like the Tbred B. Both KT333 and KT400 can do 166FSB.

2002-09-29 13:08

Sorry, what's SOI?

guido72 2002-09-29 14:24

[quote="FlatLander"]Sorry, what's SOI?[/quote]

SOI is an acronym for "Silicon On Insulator". It referes to a tecnology, patented by IBM, involved in the transistor integration. You surely know that the transistor is the basic brick of any analogical or digital modern circuit. We have different types of transistors but 95% of actual transistors are using the so called C-Mos (Complementary MOS) technology. We may think about this transistor like a electronic swtich: a certain voltage applied on the transistor decides if the current may or not pass through the transistor itself. Actually each trans. offers some resistances to the current passing (it is for this that the CPUs are dissipating a lot of heat). It has some eddy currents as well which avoid the trans. to switch quickly from one state to the other since one has to wait till these eddy currents have been discharged: this is important for the max working freq. of a transistor. Then we have the resistances and the capacitive effects given by the metallizations which are the "metallic motorways" for the electric signals passing through the micropocessors.
It would be a bit long to explain where they put what, if you don't know much about the transistor technology, anyway the S.O.I. technology is a way to reduce these kind of resistences we have inside an integrated circuit, resulting in lower power comsumption and lower heat dissipation.
Philps, Motorola and AMD unlike Intel (at least at the moment), are implementing (or trying to do it) this technology.

QuintLeo 2002-10-04 00:38

Intel HAS talked about SOI technology for future CPUs - I don't remember when they're supposed to add it to the P-IV series - or if they already have done so for the any-daynow 3Ghz to be announced. I'm pretty sure Madison (the next Itanium) is supposed to be SOI.

As I recall, IBM in the Power series is the only current SOI CPU in mass production - but I expect that to change next year, if not sooner.

xtreme2k 2002-10-04 03:44

Intel is not going for SOI. They are going for Strained Silicon. Which is a totally different approach.

guido72 2002-10-04 07:18

[quote="QuintLeo"]As I recall, IBM in the Power series is the only current SOI CPU in mass production - but I expect that to change next year, if not sooner.[/quote]

It seems to me that Apple is using this technology as well through Motorola's CPUs... But I'm not sure of it...

QuintLeo 2002-10-08 21:33

SOI and Strained Silicon *can* be used together, from something I've read.

I believe I remember mention somewhere that Opteron may go that route, if not at it's launch than later.

QuintLeo 2002-10-08 21:34

Apple uses Power PC cpus - Motorola *and IBM* are the other Power PC partners.


9-)


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