Clearspeed?
 

Surfing the web i found this:

[url]http://www.clearspeed.com/index.htm[/url] and details in [url]http://www.clearspeed.com/products.php[/url] and [url]http://www.clearspeed.com/downloads/overview_cs301.pdf[/url]

Well, for me this looks quite interesting. More then 25 GFLOPS @ 200 MHz @ 2W(typ)

Too bad there seems to be no information about the kind of floating point supported...

Tau

here is some more on it

[url]http://www.wired.com/news/technology/0,1282,60791,00.html[/url]

This week at the 2003 Microprocessor Forum in San Jose, Simon McIntosh-Smith, ClearSpeed's Director of Architecture, presents "A New, High-performance, Low-Power, Floating-Point Embedded Processor for Scientific Computing and DSP Applications".

Here is the presentation (3 MB PDF) [url]http://www.clearspeed.com/downloads/ClearSpeed_MPF_2003.pdf?PHPSESSID=fe3282f91686c81216793dcc6c1db346[/url]

"Supports multiple data types
- 8, 16, 24, and 32, ... fixed-point aritmetic
- 32-bit IEEE floating-point arithmetic"

Forget the Opteron, let's buy GIMPS a Clearspeed!

I'd imagine that the PCI bus would severely limit the processing capabilities.

32bit fixed or floating point is useless for LL testing.

One chip should cost $16500 - will take a bit longer to collect the money :whistle:

The VIA Eden-N (1GHz, 6W thermal dissipation) or Transmeta Efficeon (1.1GHz, 7W thermal dissipation) would be more interesting for clusters and such. Especially since both CPUs would allow to use their native instruction set instead of only x86, which is translated to some internal instructions on nearly every x86 compatible processor currently produced*.

I'm sure soon we'll know how their per clock performance increased. The transmeta can execute up to 8 instructions per clock but in standard use that will be x86 code translated by the on-chip JIT compiler.

Actually these low power CPUs won't be useful for clusters without mainboards allowing lots of them in an SMP configuration. As single CPU systems the power usage overhead by the board, RAM, HD and so will be too much.

*[SIZE=1]There could still be some 386/486/Pentium derivates available as embedded CPUs.[/SIZE]

[QUOTE][i]Originally posted by Dresdenboy [/i]
[B]32bit fixed or floating point is useless for LL testing.
One chip should cost $16500 - will take a bit longer to collect the money :whistle:
[/B][/QUOTE]

Err, yes. That pricetag is indeed a problem :shock:

I was not thinking about LL but of a possibility to do TF. With 64 PEs able to do 32bit Integer simultanously _and_ the possibility to use multiple chips on one PCI-Card that looked interesting (at a first glance)

It's 4K local mem per PE, 128K SRAM per Chip for code and data (64 PE) and up to 1 Gig SDRAM mem per Card.

Hmmm, ok... 4K local mem does not look promising for mersenne-related work. ..

Tau

in the wired article they said the whole setup would cost around 25,000

thats not that bad

According to Wired, it is $25,000 for 24 chips on 6 PCI boards, which translates to somewhat above $1000 per chip.

A chip gives twice the GFLOPS of a 3GHz P4, for somewhat more than twice the price, meaning you need quite a few chips before it starts to get interesting in terms of GFLOPS/$.

Clearspeed uses its own native, RISC-like (not x86) instruction set.

Although of limited use for GIMPS, I think the chip looks promising, although prices will have to fall about 50% before it starts to be interesting for the kind of applications I would use it for.

I wonder how good it would be at Trial Factoring?

Not sure it would be worth the cost, though....

A couple of links:

Coprocessors are a doomed concept - as a niche market, the volume is so low they cannot afford to keep up the pace of general-purpose CPUs. Right now, Clearspeed has twice the (FP) throughput of a P4. But it won't ship until next year, when the difference will be smaller. Assume a year to optimize an application for the coprocessor, and the net benefit is smaller still. One more year of running the app, and general-purpose CPUs will have passed the coprocessor in performance.
[url]http://arstechnica.infopop.net/OpenTopic/page?a=tpc&s=50009562&f=174096756&m=6020924095&r=1280954095#1280954095[/url]

Clearspeed may examplify a future direction of general-purpose CPUs:
[url]http://arstechnica.infopop.net/OpenTopic/page?a=tpc&s=50009562&f=174096756&m=6020924095&r=8580925095#8580925095[/url]