[QUOTE=Kevin;171090]Even in LMH ranges, everything has been done to 2^63[/QUOTE]Not true -- there's plenty of ranges done only to 2^59, up in the [url=http://v5www.mersenne.org/report_factoring_effort/?exp_lo=910000000&exp_hi=910001000&bits_lo=0&bits_hi=63&txt=1&exassigned=1&B1=Get+Data]900M range[/url] for example. Grab as many of those as you feel like handling and change the lines from "910000031,59,," to "Factor=910000031,59,63" and fill up your worktodo with your most-efficient assignments.

Well, that would be the most "efficient" use of that type of CPU, however looking at near-term GIMPS progress it would be more-or-less the same as not participating -- nobody's going to be worrying about the 900M range (for P-1 or LL testing) for quite a while (years) yet.

[QUOTE=James Heinrich;171126]Well, that would be the most "efficient" use of that type of CPU, however looking at near-term GIMPS progress it would be more-or-less the same as not participating -- nobody's going to be worrying about the 900M range (for P-1 or LL testing) for quite a while (years) yet.[/QUOTE]However it will keep other CPU's from doing them, so other LMH'ers will do other more vital areas sooner.

[quote=Kevin;171090]Even in LMH ranges, everything has been done to 2^63 (except for 90-91M, which is in progress).[/quote]

I've finished 90-91M to 2^63 somewhen lately. I'll have the LMH assigned ranges thread updated, thanks.

[QUOTE=James Heinrich;171126]Not true -- there's plenty of ranges done only to 2^59, up in the [url=http://v5www.mersenne.org/report_factoring_effort/?exp_lo=910000000&exp_hi=910001000&bits_lo=0&bits_hi=63&txt=1&exassigned=1&B1=Get+Data]900M range[/url] for example. Grab as many of those as you feel like handling and change the lines from "910000031,59,," to "Factor=910000031,59,63" and fill up your worktodo with your most-efficient assignments.

Well, that would be the most "efficient" use of that type of CPU, however looking at near-term GIMPS progress it would be more-or-less the same as not participating -- nobody's going to be worrying about the 900M range (for P-1 or LL testing) for quite a while (years) yet.[/QUOTE]

Those would be part of "LMH>100M", that's a whole different subforum :razz:. I agree that it's not really worth bothering with those ranges unless it happens to tickle your fancy.

I'm back in the game...
 

1 Q9550 core started P-1 (again - after a small hiatus) literally 5 minutes ago.
1 PIV 3.4 will be starting Thursday
1 E6600 core will be starting Saturday

Personal P-1 Observation
 

3 Different machines doing P-1 in the 50M range.
All with 768Mb RAM available to the P-1 specifically.
For both the Duo and the Quad ALL other cores were doing 28-29M LL tests.

PIV 3.4 Ghz: S1:24 hrs + S2:35Hrs = Tot:59 Hrs
Duo E6550 2.33 Ghz: S1:21 hrs + S2:28Hrs = Tot:49 Hrs
Quad 9550 2.87 Ghz: S1:20 hrs + S2:34Hrs = Tot:54 Hrs

Stage 1 times are proportional as expected.
The anomaly is that the Stage 2 times are the MOST out-of-whack for the Quad; only slightly below the PIV and quite a bit above the Duo.

I was told it has to do with Bus/Memory contention on the Quad.

Based on this observation I will be using 1 cores from each Duo for P-1 and let the Quad go back to LL.

During the past few years I basically did nothing but LL testing on my machines. Recently I started to do some TF work as well because I found that my Athlon 64 X2 is much faster at TF, even outpacing my Xeon server easily, and my new notebook is running few hours only so that it needs some less heavy work.

So I assigned P-1 work to one of the cores of my laptop and found that it's really MUCH faster than I expected.

Core 2 Duo T7700 @ 2.4 GHz:
Memory: 1024MB RAM at day and 1280 MB RAM at night time
Expo: 50M range

Stage 1: 17.2 hrs + Stage 2: 8.2 hrs = Total: 25.4 hrs

Stage 2 is really running fast on this platform, amazingly fast compared to the posted data on other Duo and Quad processors.

This made me curious to see how my Xeon server performs. Hence I just registered one core to do P-1 on another 50M range expo. It's running at the same clock speed (L5420 @ 2.4 GHz) so let's see how it's doing.

Based on the first few iterations stage 1 will take about 16.8 hrs, which is just a little bit faster than my notebook. Will get back once stage 2 is completed.

Note: All machines are running the 64-bit version of Prime95 v25.9, build 4

[QUOTE=Sunfish;178036]Stage 1: 17.2 hrs + Stage 2: 8.2 hrs = Total: 25.4 hrs
Stage 2 is really running fast on this platform, amazingly fast compared to the posted data on other Duo and Quad processors.[/QUOTE]What kind of bounds are being selected for P-1? Can you copy-paste output from a worker window similar to this, please?[quote][color=gray][Jun 18 19:24:42] Optimal P-1 factoring of M51051523 using up to 2000MB of memory.
[Jun 18 19:24:42] Assuming no factors below 2^68 and 2 primality tests saved if a factor is found.
[Jun 18 19:24:43] Optimal bounds are B1=605000, B2=17545000
[Jun 18 19:24:43] Chance of finding a factor is an estimated 6.75%
[Jun 18 19:24:44] Using FFT length 3072K, 2 threads
[Jun 18 19:24:44] Setting affinity to run helper thread 1 on any logical CPU.
[Jun 18 19:45:38] Available memory is 1011MB.
[Jun 18 19:45:38] Using 989MB of memory. Processing 35 relative primes (354 of 480 already processed).
[Jun 18 19:46:10] M51051523 stage 2 is 75.909481% complete.[/color][/quote]

The bounds were B1=650000, B2=16650000 if I remember correctly.

I will check and confirm it once I'm back home this evening. I also started another P-1 test and will post the results when available.

If you could send me a benchmark for your T7700 for my [url=http://mersenne-aries.sili.net/throughput.php]throughput calculator[/url] I'd appreciate it.

[quote=James Heinrich;178136]If you could send me a benchmark for your T7700 for my [URL="http://mersenne-aries.sili.net/throughput.php"]throughput calculator[/URL] I'd appreciate it.[/quote]
I'll try to get it to you by tomorrow. Nice calculator! Probably I'll add the benchmark data for my Xeon L5420 as well. Just need to get some urgent things done first.