[QUOTE=Jeff Gilchrist;140974]So Ernst, are you going to make this shiny new Mlucas code available to everyone when this is all over?[/QUOTE]
Of course - I am targeting the release of what will be called v3.0 for later this Fall. But still a lot of work to do:

- Finish translation of MSVC-style inline ASM code to GCC syntax
- Add Primenet networking support
- Lots of profiling and tuning of the multithreading
- Perhaps try some 64-bit-OS-specific optimizations
- Maybe bang together a basic Qt-based GUI

...and this in the plentiful [that's a joke, BTW] time left to me by my for-pay job. That means a lot of not-having-a-life-outside-of-work, but with the proverbial finish line in sight, gotta gut it out at least through the release and initial wave of widescale testing.

[quote]I don't have any Ferrari's or Lamborghini's in my garage, and I can't even use any special Bull Linux tricks. I'm just hoping to squeak in a finish before Tony even though I had quite a head start... :cry:[/QUOTE]
Yeah, that seems a little unfair - maybe you can get Monsieur T-Reix to agree to play just enough Tetris on his his NUMA machine to ensure you both finish in a virtual "gentlemen's tie".

Rob, I'm just curious - has Sun organized any small PR-related blurbs around this? With all the bad-news-on-so-many-other-fronts and questions about their business strategy having hammered their share price this year, you'd think they'd be hungry for some good PR about their shiny new Sparc-based server hardware. I have no special interest in the company [except that being a speed whore I do enjoy access to the fancy hardware and latest compilers] and own no stock, but I remember Sun in its Sparc 1 & 2 heyday and dislike the thought of one of the last remaining RISC-chip vendors [especially now that they seem to have gotten their chip-design act back together again after the doldrums of the Sparc 3 thru V] getting out of the CPU business. Competition is good, and it seems every year Intel has less of it.

[QUOTE=T.Rex;140852]My guess is that verifications will end this month about the:
- 10th - 9pm for rgiltrap
- 13th - 6am for my-self
- 14th - 9am for Jeff
France time (substract 7h for USA East coast).
(based on information given in this thread and with some computation...).
[/QUOTE]

Maybe I'm just really stupid; but aren't there 4 verifiers?

[QUOTE=jinydu;140978]Maybe I'm just really stupid; but aren't there 4 verifiers?[/QUOTE]

I think it's a little misleading as there is a collective of Tom Duell & I (Rob Giltrap) running one test using Ernst's Mlucas 3.0 pre-release code. Actually we're now running two copies in parallel on SPARC64 VI & SPARC64 VII.

I'm guessing that the large number of verifications going on indicates that this is a 10M + digit prime.

[QUOTE=MooooMoo;140997]I'm guessing that the large number of verifications going on indicates that this is a 10M + digit prime.[/QUOTE]
Nah, we were just bored.

[QUOTE=ewmayer;140900][i][Sep 04 04:30:19] Mxxxxxxxx Iter# = 2**00000 clocks = 00:26:06.000 [ 0.0224 sec/iter] Res64: 9A889EC66E9DB2DC. AvgMaxErr = 0.000001898. MaxErr = 0.00000381[/i]

[i][Sep 04 08:11:23] Mxxxxxxxx Iter# = 2**00000 clocks = 00:33:51.000 [ 0.0203 sec/iter] Res64: CC42FF0C3E6FDD1E AvgMaxErr = 0.000002711. MaxErr = 0.000003815[/i][/QUOTE]

So 22.4ms/iteration and 20.3 ms/iteration at 4096K FFT.

Comparing to x86 hardware at 4096K FFT (75M exponent) in Prime95:

[U]Core2Duo (Conroe) E6750 2.66 Ghz:[/U] 55.4 ms/iteration (both cores on it)

[U]Core2Quad (Yorksfield) Q9450 2.66 Ghz:[/U] 43.4 ms/iteration (all 4 cores on it)

[QUOTE=ewmayer;140900]
[i][Sep 04 04:30:19] Mxxxxxxxx Iter# = 2**00000 clocks = 00:26:06.000 [ 0.0224 sec/iter] Res64: 9A889EC66E9DB2DC. AvgMaxErr = 0.000001898. MaxErr = 0.00000381[/i]

So even though this is still at the wastefully long FFT length of 4096K, we are running as fast as Tony Reix's more-recently-started verify run.[/QUOTE]
Tony's verification run started on September 2nd and is expected to complete on Sept. 13th. This is 11 days, or 950,400 seconds. Let's assume that TRex's run is completing at 0.0222 sec/iter, very similar to ewmayer's 0.0224 sec/iter in the quote above. That means it's being finished at 45 iterations/sec.

Therefore, 950,400 seconds * 45 iterations/sec = [b]42,768,000,[/b] which is well into the 10M+ digit range.

So, what is the actual exponent? For that, we have to look at a guess posted earlier and it's response:

[QUOTE=retina;140721]Here's a silly thought. Looking at the M44 data suggests to me that the server waited until the first LL (non double check) exponent came in that was <10M digits and then placed the fake residue. If that is how the code logic works, then it might point to the exponent immediately before the "fake" exponent?[/QUOTE]

[QUOTE=jinydu;140724]Actually, 28829407, 42801739 and 42760397 are all consistent with that hypothesis.[/QUOTE]
Compare them with my estimate of 42,768,000 and decide which one fits it the best :smile:

(* mumble *) inflation factor (* mumble *) ...

[QUOTE=ewmayer;140975] Rob, I'm just curious - has Sun organized any small PR-related blurbs around this? [/QUOTE]

I've advised the PR team and I'm sure they will do something, but the real Sun PR team are now the [URL="http://blogs.sun.com/"]bloggers[/URL] both within Sun and the wider Sun community, so I'll judge success from that in the first instance.

[QUOTE=ewmayer;140975]
I remember Sun in its Sparc 1 & 2 heyday and dislike the thought of one of the last remaining RISC-chip vendors [especially now that they seem to have gotten their chip-design act back together again after the doldrums of the Sparc 3 thru V] getting out of the CPU business. Competition is good, and it seems every year Intel has less of it.[/QUOTE]

I actually get a little giddy talking about where Sun is at with it's server hardware. I'm like a child in a candy store.

[URL="http://en.wikipedia.org/wiki/UltraSPARC_T2"]Niagara2[/URL] at 64 threads is an incredibly impressive "system on a chip" which just eats workload with linear performance for horizontal applications (truly unique). The forthcoming [URL="http://en.wikipedia.org/wiki/Rock_processor"]Rock[/URL] again is a radical departure from the norm which really fits well with the Sun culture of civil disobedience. :cool:

Then the SPARC64 VI/VII line is just a lovely dose of BRUTE FORCE. Nice balance of clock speed vs cache size vs SMP scalability vs large I/O. I have a customer that dubbed the M-series systems as [URL="http://en.wikipedia.org/wiki/Vacuum_cleaner"]Hoovers[/URL] based on their ability to suck and blow I/O from and to the fastest of SANs. Those working in the enterprise space know it's all about I/O these days.

Finally, Sun's re-embrace of x64 gives a whole arsenal of AMD & Intel systems to play with and with the likes of Intel's [URL="http://www.youtube.com/user/ossiTeam"]David Stewart and team[/URL] providing some [URL="http://www.opensolaris.org"]OpenSolaris[/URL] love, Sun is well and truly back at the forefront of systems technology.

[QUOTE=MooooMoo;141024]

Compare them with my estimate of 42,768,000 and decide which one fits it the best :smile:[/QUOTE]

We don't have nearly enough precision to distinguish between 42801739 and 42760397. Those two exponents differ by less than 0.01%.

[QUOTE=rgiltrap;140991]I think it's a little misleading as there is a collective of Tom Duell & I (Rob Giltrap) running one test using Ernst's Mlucas 3.0 pre-release code. Actually we're now running two copies in parallel on SPARC64 VI & SPARC64 VII.[/QUOTE]


I see. So Ernst isn't personally doing a verification run.

Ernst,
At St Paul's School I taught a potential whizz kid named
Tony Duell. No relation by any chance?

David