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-   -   AlderLake anyone? (https://www.mersenneforum.org/showthread.php?t=27112)

Prime95 2021-08-31 00:53

AlderLake anyone?
 
Does anyone here have access to an Alder Lake system?

I know prime95 will have some difficulties with the big.little architecture. I'd like to code up some upgrades and have someone test them. If under NDA, I think we can discuss bugs without discussing the architecture specifics.

JWNoctis 2021-08-31 07:27

Off topic, but...it's been a while, and I'm kind of surprised that nobody here had brought up the fact that, for whatever reason, Alder Lake apparently won't have AVX-512 support in consumer/client-level processors, including the entire Core lineup.


Which to my understanding would have a non-trivial impact on performance for Prime95, for those who still intend to crunch on their personal machine and planning to buy one of those.



It would be interesting to see some comparison for sure.

elmor 2021-09-03 06:47

Hello, I can assist you with testing. You can contact me on the email address I registered with.

kriesel 2021-09-03 12:23

[QUOTE=JWNoctis;586909]for whatever reason, Alder Lake apparently won't have AVX-512 support in consumer/client-level processors, including the entire Core lineup.

Which to my understanding would have a non-trivial impact on performance for Prime95[/QUOTE]It also means that for mprime / prime95, the top of the mersenne.org exponent space will be out of reach. AVX2/FMA3 fft lengths implemented max out at 920.8M.
[url]https://en.wikipedia.org/wiki/Alder_Lake_(microprocessor)[/url]

Zhangrc 2021-09-03 12:53

[QUOTE=kriesel;587147]
[url]https://en.wikipedia.org/wiki/Alder_Lake_(microprocessor[/url])[/QUOTE]

Off topic, but the right bracket outside the URL tag causes confusion.

You always tell people to check spelling and grammar for every post.

But we must accept that even the best of us make typos and mistakes.

The link should be: (A futile attempt to make this post more relevant :sad:)

[url]https://en.wikipedia.org/wiki/Alder_Lake_(microprocessor)[/url]

axn 2021-09-03 13:52

[QUOTE=kriesel;587147]AVX2/FMA3 fft lengths implemented max out at 920.8M. [/QUOTE]

It is trivial to extend FFT lengths. But only masochists and morons would test these high exponents with today's technology.

kruoli 2021-09-03 13:55

[QUOTE=Zhangrc;587148]The link should be: (A futile attempt to make this post more relevant :sad:)

[url]https://en.wikipedia.org/wiki/Alder_Lake_%28microprocessor%29[/url][/QUOTE]

Here you go. :smile: Replace brackets with their URL escape equivalent.

kriesel 2021-09-03 14:11

[QUOTE=Zhangrc;587148]You [STRIKE]always[/STRIKE] tell people to check spelling and grammar
[/QUOTE]My bad, I thought a copy/paste of a URL that had already worked for me would be no problem, but apparently it got clobbered.
[QUOTE=axn;587153]It is trivial to extend FFT lengths.[/QUOTE]Then it should be easy for you to help resolve the known server issue of being unable to handle in its SSE2 instruction set, PRP proof files for exponents >595M requiring longer than 32M fft length. Such exponents can be fully PRP tested in ~ 7 weeks (to ~ 4-5 months for ~1G) on Radeon VIIs including proof file generation, for various test/QA purposes, and benchmarked much quicker for checking run time scaling empirically.

axn 2021-09-03 14:55

[QUOTE=kriesel;587157]Then it should be easy for you [/quote]
Me? No. George, yes. But last I checked he's neither a masochist nor a moron.

[QUOTE=kriesel;587157]PRP proof files for exponents >595M requiring longer than 32M fft length. Such exponents can be fully PRP tested in ~ 7 weeks (to ~ 4-5 months for ~1G) on Radeon VIIs including proof file generation, for various test/QA purposes, and benchmarked much quicker for checking run time scaling empirically.[/QUOTE]

None of these are valid activities in 2021 (IMO). Maybe in 2041, perhaps?

kriesel 2021-09-03 15:36

[QUOTE=axn;587158]George, yes. But last I checked he's neither a masochist nor a moron.[/QUOTE]I don't believe Ernst is either, yet ffts up to 512M are now available in Mlucas. (Mainly I think due to Ernst's plan to test F33.) Nor Mihai either, yet ffts up to 120M length and sometimes higher have been available in gpuowl for years. For that matter, CUDALucas had 128M fft length several years ago.

I test while I still can. I'm of an age that, assuming I'm still above the sod then, abilities may have declined considerably in another 20 years. Such testing has already identified the server's current limitation, and some client software issues. Production running is typically wavefronts only. Experimenting with testing widely keeps it interesting. Finding issues early gives George et al maximum time to perhaps address them, before they become an issue at the wavefront, and before their abilities decline due to aging, or whatever calamity might befall them.[QUOTE]None of these are valid activities in 2021 (IMO). Maybe in 2041, perhaps?[/QUOTE]But we digress. Looking forward to seeing what Alder Lake can bring to the party.
Welcome to the forum Elmor.

mackerel 2021-09-05 08:21

[QUOTE=JWNoctis;586909]Off topic, but...it's been a while, and I'm kind of surprised that nobody here had brought up the fact that, for whatever reason, Alder Lake apparently won't have AVX-512 support in consumer/client-level processors, including the entire Core lineup.

Which to my understanding would have a non-trivial impact on performance for Prime95, for those who still intend to crunch on their personal machine and planning to buy one of those.[/QUOTE]

A possible explanation I've seen is that both cores need to share a common feature set. As threads get moved around you can't end up with a situation where code needs AVX-512, but it can't be provided by the E cores. The solution for now is to disable AVX-512 where you have E cores present. Unfortunately they have also said you can't get AVX-512 back by disable E cores and run only P cores. I had hoped something smarter could be done at OS level, where for example code needing AVX-512 would only be run on P cores and not touch the E cores at all.

For consumer level CPUs, for bigger FFTs were way into the region where ram bandwidth is limiting. In that scenario, the loss of AVX-512 is less of an impact, and having faster DDR5 speeds would probably result in a net increase to performance.

Where the loss of AVX-512 will be felt more is for those like me who focus on smaller FFTs that are not limited by ram speeds. The open question remains, just what sort of FMA performance can the E cores provide? It might be a case of quantity over quality to provide a possible net positive in performance.

scan80269 2021-09-05 15:14

George, I can assist with Alder Lake testing also.

One thing to keep in mind regarding Intel Alder Lake is that this processor family should run Windows 11 instead of Windows 10. Win11 has scheduler optimizations that work in conjunction with the Intel Thread Director feature of Alder Lake for improved performance. Win10 scheduler has no hybrid core architecture support and does not differentiate between the P and E cores of Alder Lake.

JWNoctis 2021-09-07 02:25

[QUOTE=mackerel;587305]A possible explanation I've seen is that both cores need to share a common feature set. As threads get moved around you can't end up with a situation where code needs AVX-512, but it can't be provided by the E cores. The solution for now is to disable AVX-512 where you have E cores present. Unfortunately they have also said you can't get AVX-512 back by disable E cores and run only P cores. I had hoped something smarter could be done at OS level, where for example code needing AVX-512 would only be run on P cores and not touch the E cores at all.

For consumer level CPUs, for bigger FFTs were way into the region where ram bandwidth is limiting. In that scenario, the loss of AVX-512 is less of an impact, and having faster DDR5 speeds would probably result in a net increase to performance.

Where the loss of AVX-512 will be felt more is for those like me who focus on smaller FFTs that are not limited by ram speeds. The open question remains, just what sort of FMA performance can the E cores provide? It might be a case of quantity over quality to provide a possible net positive in performance.[/QUOTE]

Admittedly, my first reaction was wondering if that is some sort of market segmentation, before realizing just now that the segmentation's been there since the beginning, by limiting memory bandwidth.

...Which is too slow, considering that I've already seen my computer hitting that limit, where there's only <5% performance gain of large-FFT throughput for 30% more clock frequency, 50% more power consumption, and running 20 degrees Celsius hotter, even without AVX-512, before I tuned it down a bit.:blush:

Another thing worth looking out for might be large L3 cache and very large and exotic L4 cache, though I doubt either would be coming to anything justifiably affordable to most individuals anytime soon from any manufacturer.

Skatterbencher 2021-09-18 05:27

What would be the appropriate version for Prime95 to use with ADL-S and Win11?


If any further help is needed, I can also assist.

Prime95 2021-09-18 16:18

[QUOTE=Skatterbencher;588091]What would be the appropriate version for Prime95 to use with ADL-S and Win11?[/QUOTE]

Any version should work but may need some tweaking. Prime95 cannot handle some cores with hyperthreading and some without. To run a torture test you'll need to look in undoc.txt for NumCPUs and CPUHyperthreads. If Alderlake is 2 hyperthreaded performance cores and 3 non-hyperthreaded efficiency cores then set NumCPUs=7 and CPUhyperthreads=1.

Similarly, prime95 will struggle assigning workers to the performance cores. Start and cancel a benchmark. Look at results.bench.txt. You'll likely need to tell prime95 which core(s) to assign to each worker. See Affinity= in undoc.txt.

Skatterbencher 2021-09-19 08:04

Thanks!

Prime95 2021-10-02 21:48

Version 30.7 available:

[url]https://www.mersenneforum.org/showthread.php?t=27180[/url]

The one user that has tried this had problems. I need more data to hopefully figure out what is going on.

tuckerkao 2021-10-07 01:57

[QUOTE=Prime95;586898]Does anyone here have access to an Alder Lake system?[/QUOTE]
I thought Intel 12900k won't be available until Nov 4, 2021, has it been released early?

What DDR5 memories does 12900k support? How expensive are those?

Prime95 2021-10-07 03:09

[QUOTE=tuckerkao;589693]I thought Intel 12900k won't be available until Nov 4, 2021, has it been released early?[/QUOTE]

I don't know the release date. Those who have one are under a non-disclosure agreement. They cannot tell you anything about what it supports or does not support.

Batalov 2021-10-28 01:09

Newegg and other retailers started taking preorders...
Tempting!

Prime95 2021-10-28 01:43

[QUOTE=Batalov;591812]Newegg and other retailers started taking preorders...
Tempting![/QUOTE]

Disclaimer: I know absolutely nothing about AlderLake's performance.

If it were me, the way Intel has fallen behind AMD over the last 5 years, I would wait until some hard numbers came out.

JWNoctis 2021-10-28 02:20

In other news, apparently Intel had lifted the default PL1 setting for at least the higher-end Alder Lake processors and motherboards...[URL="https://www.igorslab.de/en/get-into-the-breaking-rod-out-of-the-lake-you-may-now-get-up-to-241-watts-permitted-yet-wherefore/"]to 241W[/URL].

Smells gamey, with a hint of toasted electronics - Wonder what would Prime95 and similar workloads do to the processor and its VRM, with power limits like that? Not that whatever happens would not probably be covered by warranty with [I]default[/I] setting like that, and not that Prime95 doesn't already have disclaimers for such damage in its EULA, though.

Dobri 2021-10-28 03:01

Some basic info about Alder Lake appeared in Forbes, see [url]https://www.forbes.com/sites/antonyleather/2021/10/27/intel-12th-gen-alder-lake-12900k-12700k-and-12600k-hybrid-desktop-processors-announced-biggest-performance-leap-in-a-decade[/url],

firejuggler 2021-10-28 07:59

Intel older Lake
 
Alder Lake price and a first look at
[url]https://www.anandtech.com/show/16959/intel-innovation-alder-lake-november-4th[/url]

M344587487 2021-10-28 13:44

I know the initial parts are the top and mid-range, all of them having a triple digit upper power limit (125W) at base frequency is still concerning. Infinite boost means the upper target is the one to pay attention to out of the box anyway. At the least that sets some high minimum expectations from the Z690 motherboards but probably also does a number on the price.


Anyone looking to maximise bandwidth without OC should make sure to get a board with only two DDR5 slots, intel guarantees up to 4800 DR support on those but only 4400 DR on four slot boards.

Xyzzy 2021-11-04 15:09

[url]https://www.techpowerup.com/review/intel-core-i9-12900k-alder-lake-12th-gen/[/url]
[url]https://www.techpowerup.com/review/intel-core-i7-12700k-alder-lake-12th-gen/[/url]
[url]https://www.techpowerup.com/review/intel-core-i5-12600k-alder-lake-12th-gen/[/url]

M344587487 2021-11-04 15:23

[QUOTE=mackerel;587305]A possible explanation I've seen is that both cores need to share a common feature set. As threads get moved around you can't end up with a situation where code needs AVX-512, but it can't be provided by the E cores. The solution for now is to disable AVX-512 where you have E cores present. Unfortunately they have also said you can't get AVX-512 back by disable E cores and run only P cores. I had hoped something smarter could be done at OS level, where for example code needing AVX-512 would only be run on P cores and not touch the E cores at all.

For consumer level CPUs, for bigger FFTs were way into the region where ram bandwidth is limiting. In that scenario, the loss of AVX-512 is less of an impact, and having faster DDR5 speeds would probably result in a net increase to performance.

Where the loss of AVX-512 will be felt more is for those like me who focus on smaller FFTs that are not limited by ram speeds. The open question remains, just what sort of FMA performance can the E cores provide? It might be a case of quantity over quality to provide a possible net positive in performance.[/QUOTE]


Apparently you can use AVX-512 by disabling the E cores, but it may depend on the motherboard. This video shows the setting present in a bios: [url]https://youtu.be/fhI9tLOg-6I?t=1650[/url]


These things use tremendous amounts of power out of the box (if thermals/whatever allow, a loaded 12900k uses ~240W versus a 5950X using ~120W), hopefully they underclock really well.

Xyzzy 2021-11-04 15:29

[url]https://arstechnica.com/gadgets/2021/11/intels-alder-lake-big-little-cpu-design-tested-its-a-barn-burner/[/url]

kriesel 2021-11-04 16:36

"Does not include free kitten"! :davar55:

chalsall 2021-11-04 20:37

[QUOTE=kriesel;592428]"Does not include free kitten"![/QUOTE]

Please trust me on this. One needs to think seriously about taking on a kitten. Many bites... Much clawing... Ideally, lots of purring...

It's a bit like [URL="https://www.youtube.com/watch?v=Cj8n4MfhjUc"]the Spanish Inquisition.[/URL] Only, different... :smile:

JWNoctis 2021-11-05 01:28

[QUOTE=M344587487;592421]Apparently you can use AVX-512 by disabling the E cores, but it may depend on the motherboard. This video shows the setting present in a bios: [URL]https://youtu.be/fhI9tLOg-6I?t=1650[/URL]


These things use tremendous amounts of power out of the box (if thermals/whatever allow, a loaded 12900k uses ~240W versus a 5950X using ~120W), hopefully they underclock really well.[/QUOTE]
Interesting read about that here : [URL]https://www.anandtech.com/show/17047/the-intel-12th-gen-core-i912900k-review-hybrid-performance-brings-hybrid-complexity/2[/URL]

It remains to be seen whether:

1 - Their AVX-512 instructions would reliably produce correct results in any significant number of cores and chips, as these might not be binned to do so, and
2 - Whether that's actually gonna stay, or be gone in the next stepping, or have a cease-and-desist slapped on it, or something else.

What's about certain is that without AVX-512, Alder Lake is probably going to be slower than Rocket Lake for Prime95, [URL="https://www.tomshardware.com/news/intel-core-i9-12900k-and-core-i5-12600k-review-retaking-the-gaming-crown"]if y-cruncher results are comparable[/URL].

nordi 2021-11-05 12:50

[QUOTE=JWNoctis;592478]What's about certain is that without AVX-512, Alder Lake is probably going to be slower than Rocket Lake for Prime95, [URL="https://www.tomshardware.com/news/intel-core-i9-12900k-and-core-i5-12600k-review-retaking-the-gaming-crown"]if y-cruncher results are comparable[/URL].[/QUOTE]
What do you mean? The [URL="https://cdn.mos.cms.futurecdn.net/PkwrfgFWwdtSm3LvSWn2kg-970-80.png.webp"]y-cruncher results show Alder Lake in the lead[/URL], especially with DDR-5 RAM.

Trilo 2021-11-05 14:58

[QUOTE=nordi;592507]What do you mean? The [URL="https://cdn.mos.cms.futurecdn.net/PkwrfgFWwdtSm3LvSWn2kg-970-80.png.webp"]y-cruncher results show Alder Lake in the lead[/URL], especially with DDR-5 RAM.[/QUOTE]

DDR5 is quad channel. I assume this helps with these benchmarks especially with y-cruncher being memory bound.

JWNoctis 2021-11-05 15:00

[QUOTE=nordi;592507]What do you mean? The [URL="https://cdn.mos.cms.futurecdn.net/PkwrfgFWwdtSm3LvSWn2kg-970-80.png.webp"]y-cruncher results show Alder Lake in the lead[/URL], especially with DDR-5 RAM.[/QUOTE]
...I think I've been confused by the [URL="https://cdn.mos.cms.futurecdn.net/EVAZzdvsqDwKjbeHVrTbeg-970-80.png.webp"]single-thread result[/URL]. My bad.

Would be interesting if someone could try that again, but without E-core and with AVX-512 enabled.

kriesel 2021-11-05 15:02

[QUOTE=chalsall;592453]like [URL="https://www.youtube.com/watch?v=Cj8n4MfhjUc"]the Spanish Inquisition.[/URL] Only, different.[/QUOTE]So, "does not include a free kitten" is a feature. What you described is why I prefer senior cats. Mellow. Content to watch TV or perch on lap or nap in a corner. Don't jump on top of the counter or table or cupboards. Don't chew live electrical cords or mouse cables. Etc.

M344587487 2021-11-05 15:35

[QUOTE=Trilo;592518]DDR5 is quad channel. I assume this helps with these benchmarks especially with y-cruncher being memory bound.[/QUOTE]
Technically each DDR5 DIMM has two channels, but each channel has half the width relative to DDR4 and all marketing will still call a single DIMM of DDR5 single channel, meaning the basic speeds are comparable between DDR4 and DDR5. Dual channel DDR5 at 3200 is twice the bandwidth of dual channel DDR4 at 1600. The win Alderlake with DDR5 naturally has for benchmarks is that they're specified to work with 4400/4800 speeds, compared to Alderlake and Ryzen specified to work with DDR4 at 3200. Most places will benchmark only at specified speeds, some benchmark with overclocked memory but this is mostly common for gaming which doesn't necessarily tax the memory like Prime95 would (the common overclock being around DDR5 5500, I've seen one that went with DDR5 6000 which looks to be near the fastest available).

JWNoctis 2021-11-06 01:06

[QUOTE=M344587487;592523]Most places will benchmark only at specified speeds, some benchmark with overclocked memory but this is mostly common for gaming which doesn't necessarily tax the memory like Prime95 would (the common overclock being around DDR5 5500, I've seen one that went with DDR5 6000 which looks to be near the fastest available).[/QUOTE]


Anything much faster than DDR5-6000 [URL="https://www.tomshardware.com/news/gear-4-mode-tested-on-alder-lake"]might not help much anyway[/URL], not with latency. Though I don't know whether that would actually do much, as far as Prime95 is concerned.

Next-gen processors with enough cache to run first-time tests without eviction couldn't come soon enough.

VBCurtis 2021-11-06 03:14

Prime95 generally saturates memory bandwidth, so any increase in bandwidth via higher speeds is good for our use case. Latency isn't important to P95 speed.

You can test this by changing your own memory latencies in BIOS, if you have motherboard support to do so. Leave speed the same, slow down (higher number) latency, benchmark.

Xyzzy 2021-11-23 14:12

We decided to put together a gaming computer so we could free up our [URL="https://www.mersenneforum.org/showthread.php?t=26686"]YOLO[/URL] computer for "real" work.

Several sources claim that DDR4 memory Z690 motherboards are (roughly) as performant as DDR5 motherboards in gaming, maybe because of the increased latency that DDR5 introduces. Given that DDR5 is also impossible to find/buy right now we went with a DDR4 board. We should have the parts within a week or so.

Here is what we have ordered so far.

[C]CPU: Intel Core i5-12600K 3.7 GHz 10-Core Processor
CPU Cooler: Noctua NH-U12A chromax.black 60.09 CFM CPU Cooler
Memory: G.SKILL Ripjaws V Series 32GB (4 x 8GB) 288-Pin DDR4 SDRAM DDR4 3600 (PC4 28800) Intel XMP 2.0 Desktop Memory Model F4-3600C14Q-32GVKA
Motherboard: MSI MAG Z690 TOMAHAWK WIFI DDR4 ATX LGA1700 Motherboard
Storage: Western Digital Black SN850 1 TB M.2-2280 NVME Solid State Drive
Case: Fractal Design Define 7 Compact ATX Mid Tower Case
Power Supply: SeaSonic FOCUS Plus Platinum 850 W 80+ Platinum Certified Fully Modular ATX Power Supply[/C]

OTOH, if someone here has a source for DDR5 memory we are willing to switch to a DDR5 build.

:mike:

Xyzzy 2021-11-23 14:15

[YOUTUBE]fIN8lLhSqmg[/YOUTUBE]

Xyzzy 2021-11-23 20:15

[url]https://www.techpowerup.com/review/intel-core-i9-12900k-alder-lake-ddr4-vs-ddr5/7.html[/url]

ewmayer 2021-11-25 02:55

[QUOTE=Xyzzy;593709]Several sources claim that DDR4 memory Z690 motherboards are (roughly) as performant as DDR5 motherboards in gaming, maybe because of the increased latency that DDR5 introduces. Given that DDR5 is also impossible to find/buy right now we went with a DDR4 board.[/QUOTE]

I continue to be pleasantly surprised by the performance of the budget refurb KNL system ($500) I bought a year ago ... the 16GB onboard MCDRAM is probably pretty close in terms of total bandwidth to a DDR5 module. Per [url=https://www.anandtech.com/show/9794/a-few-notes-on-intels-knights-landing-and-mcdram-modes-from-sc15]AnandTech[/url], the MCDRAM is capable of 400+ GB/sec ... how does that compare to high-end DDR5?

Best part I found out only in the past month ... when crunching on datasets much too large to fit into the MCDRAM (~200GB of p-1 stage 2 buffers in my case), the 192GB 2400MHz server-ddr4 I installed ($900) comes into play, and my initial timings showed a 2.5x performance hit vs MCDRAM-only. But fiddling with numactl flags I was able to get the OS to make much better use of the MCDRAM as a huge L3 cache, now down to just 1.5x slower than the throughput for the smaller MCDRAM-only dataset.

Xyzzy 2021-11-25 14:42

[QUOTE=ewmayer;593816]…how does that compare to high-end DDR5?[/QUOTE][URL]https://www.anandtech.com/show/16143/insights-into-ddr5-subtimings-and-latencies[/URL]

Intel 12th Gen CPU → DDR5-4800 → 38.40GB/s × 2 (dual channel) = 76.8GB

:mike:

[SIZE=1][COLOR=White]Our YOLO computer → DDR4-3200 → 25.20GB/s × 4 (quad channel) = 100.8GB/s[/COLOR][/SIZE]

Xyzzy 2021-11-28 10:31

1 Attachment(s)
[QUOTE=Xyzzy;593709]
Memory: G.SKILL Ripjaws V Series 32GB (4 x 8GB) 288-Pin DDR4 SDRAM DDR4 3600 (PC4 28800) Intel XMP 2.0 Desktop Memory Model F4-3600C14Q-32GVKA[/QUOTE]This memory runs perfectly OOTB using its XMP profile. The only manual tweaking we did was to force it to a 1T command rate.

Overall, we ended up with DDR4-3600 14-14-14-34 1T Gear 1!

:mike:

Xyzzy 2021-11-28 11:54

We benchmarked one of our [URL="https://rust.facepunch.com/"]favorite[/URL] games.

The results are kinda interesting and unexpected!
[CODE]FPS P E H
136 Y Y Y
139 Y Y N
143 Y N Y
152 Y N N


FPS = Frames per second
P = Performance cores (6)
E = Efficiency cores (4)
H = Hyperthreading enabled?[/CODE]

:mike:

M344587487 2021-11-28 12:53

Game engines don't typically scale well, even the state of the art upper end rarely optimises beyond 8 cores because that's where consoles will be for another decade. It seems that in this scenario E and H cores enabled is most likely just a hindrance to the scheduler.

Xyzzy 2021-11-28 21:20

[url]https://www.techpowerup.com/review/ddr5-memory-performance-scaling/8.html[/url]

:mike:

JWNoctis 2021-11-29 02:17

Enlightening.

E-cores aside, I'd have thought that [I]hyperthreading[/I] would not have produced that ~5% performance penalty after a decade and a half. Something's probably not working as intended with their brand-new thread director or whatsit - But then it's just one game.

Xyzzy 2021-11-30 01:48

1 Attachment(s)
Rust is an older game that is known for not being optimized.

Another game we play has an option in the settings to only use physical cores.

[URL]https://forum.escapefromtarkov.com/topic/120708-what-does-use-only-the-physical-core-mean-is-this-feature-even-in-the-game/[/URL]

[URL]https://www.reddit.com/r/EscapefromTarkov/comments/pkhuso/question_about_only_use_physical_cores/[/URL]

JWNoctis 2021-12-09 02:49

Power scaling test, at long last: [URL]https://www.techpowerup.com/review/intel-core-i9-12900k-alder-lake-tested-at-various-power-limits/[/URL]

In short, 241W [I]is[/I] sorta excessive and memory- or thread-bound workloads top out much sooner.

Xyzzy 2022-01-03 13:56

[url]https://www.techpowerup.com/290460/intel-to-disable-rudimentary-avx-512-support-on-alder-lake-processors[/url]

kriesel 2022-01-03 15:44

[QUOTE=Xyzzy;597013][URL]https://www.techpowerup.com/290460/intel-to-disable-rudimentary-avx-512-support-on-alder-lake-processors[/URL][/QUOTE]Disabling AVX512 there. OK, no Alder Lake for me then.

ewmayer 2022-01-03 19:56

More on the intel-mandated avx-512 neutering:

[url]https://www.igorslab.de/en/intel-deactivated-avx-512-on-alder-lake-but-fully-questionable-interpretation-of-efficiency-news-editorial/[/url]
[quote]Just in time for the launch of the new smaller CPU SKUs and motherboard chipsets at CES next week, all existing Z690 motherboards are supposed to completely disable the AVX-512 instruction set via a BIOS update. So far, we can only speculate about the motives. However, it would be logical that Intel would want to artificially create a sales argument for upcoming workstation and server products. This is because applications in the enterprise sector in particular often benefit the most from the acceleration provided by the AVX-512 instruction set. Actually completely capable “consumer” hardware should, if Intel has its way, no longer be a valid option here.
...
It remains the question to Intel: Why create all these artificial limitations? Is there really that much fear of the competition over at team blue, that they not only keep their aces up their sleeves, but even pull back already played cards? Of course, heavy market segmentation is nothing new for Intel, keywords “vROC’ or “only offering quad-core mainstream SKUs for the first 7 Intel Core generations”. In both cases the blue giant only moved once it was forced to by the competition. But to now retroactively neuter already sold CPUs in their functionality really does leave an exceptionally sour taste in customers mouths, even if AVX-512 was officially never supported on Alder Lake.

In our tests [url=https://www.igorslab.de/en/efficiency-secret-tip-avx-512-on-alder-lake-the-returned-command-set-in-practice-test/]we could already prove that AVX-512 on the Golden Cove P cores is indeed more efficient than AVX2[/url] and even allows more computing power with less power consumption. The only prerequisite for AVX-512 is of course the deactivation of the Gracemont E cores, which simply physically lack the transistors for this instruction set. But we’ve also seen in our tests that the e-cores only provide performance gains in very few individual cases anyway, if not the outright opposite by slowing down the cache/ring and delaying memory accesses. Does the “E” then really still stand for “Efficiency” and not rather “Error” or “E-Waste”? Wouldn’t a CPU with only P-cores and AVX-512 be the far more economic and ecological approach?[/quote]
Edit: Re. ixfd4's question below, the article notes:
[quote]To continue using AVX-512 requires slightly more exotic methods, but nothing impossible. Community members have already managed to inject an older microcode version into new BIOS releases, effectively providing a modified BIOS image with AVX-512 support. Of course, there is always a certain risk associated with such unofficial BIOS versions, since an error in the image could, for example, cause damage to the hardware. The use of such BIOS images is therefore always at your own risk! But at least this also shows that the deactivation of AVX-512 is reversible and thre is no downgrade-protection to the microcode version – at least at this point.

As the compatibility with DDR5 is still very much problematic and motherboard vendors are pushing fixes in new BIOS updates almost daily, many users now stand at a crossroads: Either install the new BIOS update for better DDR5 support and accept the removal of AVX-512, or not updating the BIOS, keep AVX-512 and stay limited in DDR5 compatibility, or install a BIOS from an unknown source that solves both problems, but might bring more in its self.[/quote]

ixfd64 2022-01-03 21:13

I wonder if there will be a way to bypass this.

PhilF 2022-01-03 22:05

Probably not, except for voting with your wallet.

kriesel 2022-01-03 22:45

So, how's the AVX512 support in affordable hardware over at the house of AMD?

LordJulius 2022-01-03 23:36

[QUOTE=kriesel;597062]So, how's the AVX512 support in affordable hardware over at the house of AMD?[/QUOTE]
Look to Zen4 having AVX512 - nothing before that.

NookieN 2022-01-05 07:00

That is disappointing. From a strictly p95 perspective, my experience with AVX512 on Cascade Lake is that it's going to saturate the (4-channel) memory long before you'll realize more throughput vs AVX2.

kruoli 2022-01-05 09:48

It depends on your FFT size. For really small work, AVX-512 will still be useful. I was impressed when I saw the improvements for small FFTs between 10th Gen and 11th Gen. But I have not seen an FFT timings or throughput benchmark of Prime95 of Alder Lake in this or the benchmark thread. Is anyone able and eager to run one and share, please? If possible, with AVX-512 enabled (as long as we can test it)?

kriesel 2022-01-05 10:31

And, above exponent ~920M, the throughput on AVX2 is zero since there's no fft >50M words coded in prime95 / mprime for that, while AVX512 reaches up to ~1169M exponent via up to 64M words fft. (Mlucas is not so limited.)


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